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| author | Paolo Bonzini <pbonzini@redhat.com> | 2013-06-06 05:41:28 -0400 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2013-07-04 17:42:44 +0200 |
| commit | 2c9b15cab12c21e32dffb67c5e18f3dc407ca224 (patch) | |
| tree | 7820aa814c6ee986999c522f3b98ef4e78f91240 /hw/cpu | |
| parent | 5767e4e19835cd39de9945bba17438e368e253bb (diff) | |
| download | qemu-2c9b15cab12c21e32dffb67c5e18f3dc407ca224.zip qemu-2c9b15cab12c21e32dffb67c5e18f3dc407ca224.tar.gz qemu-2c9b15cab12c21e32dffb67c5e18f3dc407ca224.tar.bz2 | |
memory: add owner argument to initialization functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/cpu')
| -rw-r--r-- | hw/cpu/a15mpcore.c | 2 | ||||
| -rw-r--r-- | hw/cpu/a9mpcore.c | 2 | ||||
| -rw-r--r-- | hw/cpu/arm11mpcore.c | 4 | ||||
| -rw-r--r-- | hw/cpu/icc_bus.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 648656d..773c83a 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -68,7 +68,7 @@ static int a15mp_priv_init(SysBusDevice *dev) * 0x5000-0x5fff -- GIC virtual interface control (not modelled) * 0x6000-0x7fff -- GIC virtual CPU interface (not modelled) */ - memory_region_init(&s->container, "a15mp-priv-container", 0x8000); + memory_region_init(&s->container, NULL, "a15mp-priv-container", 0x8000); memory_region_add_subregion(&s->container, 0x1000, sysbus_mmio_get_region(busdev, 0)); memory_region_add_subregion(&s->container, 0x2000, diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index 0a1a10f..26a3858 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -71,7 +71,7 @@ static int a9mp_priv_init(SysBusDevice *dev) * * We should implement the global timer but don't currently do so. */ - memory_region_init(&s->container, "a9mp-priv-container", 0x2000); + memory_region_init(&s->container, NULL, "a9mp-priv-container", 0x2000); memory_region_add_subregion(&s->container, 0, sysbus_mmio_get_region(scubusdev, 0)); /* GIC CPU interface */ diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 90dcead..67e2828 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -87,8 +87,8 @@ static void mpcore_priv_map_setup(ARM11MPCorePriveState *s) SysBusDevice *gicbusdev = SYS_BUS_DEVICE(s->gic); SysBusDevice *timerbusdev = SYS_BUS_DEVICE(s->mptimer); SysBusDevice *wdtbusdev = SYS_BUS_DEVICE(s->wdtimer); - memory_region_init(&s->container, "mpcode-priv-container", 0x2000); - memory_region_init_io(&s->iomem, &mpcore_scu_ops, s, "mpcore-scu", 0x100); + memory_region_init(&s->container, NULL, "mpcode-priv-container", 0x2000); + memory_region_init_io(&s->iomem, NULL, &mpcore_scu_ops, s, "mpcore-scu", 0x100); memory_region_add_subregion(&s->container, 0, &s->iomem); /* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs * at 0x200, 0x300... diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c index 73a1dc9..9e901e9 100644 --- a/hw/cpu/icc_bus.c +++ b/hw/cpu/icc_bus.c @@ -95,7 +95,7 @@ static void icc_bridge_init(Object *obj) /* Do not change order of registering regions, * APIC must be first registered region, board maps it by 0 index */ - memory_region_init(&s->apic_container, "icc-apic-container", + memory_region_init(&s->apic_container, NULL, "icc-apic-container", APIC_SPACE_SIZE); sysbus_init_mmio(sb, &s->apic_container); s->icc_bus.apic_address_space = &s->apic_container; |