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authorVijai Kumar K <vijai@behindbytes.com>2021-04-01 23:44:56 +0530
committerAlistair Francis <alistair.francis@wdc.com>2021-05-11 20:02:05 +1000
commit07f334d89d47cba59f8f47fdc8f5983234487801 (patch)
tree2777eadd9396e9d4af57abda7ba8122a0c29c8b8 /hw/char/trace-events
parent7a261bafc8ee01294cc709366810798bec4fe2f7 (diff)
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hw/char: Add Shakti UART emulation
This is the initial implementation of Shakti UART. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-4-vijai@behindbytes.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/char/trace-events')
-rw-r--r--hw/char/trace-events4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/char/trace-events b/hw/char/trace-events
index 76d5293..c8dcade 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -90,6 +90,10 @@ cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1"
nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
+# shakti_uart.c
+shakti_uart_read(uint64_t addr, uint16_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx16 " size %u"
+shakti_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
+
# exynos4210_uart.c
exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)"
exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready"