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authorCédric Le Goater <clg@kaod.org>2018-06-15 14:57:15 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-06-15 15:23:34 +0100
commit2151b044fdca74a4fe7148f302ba9d6191516744 (patch)
tree8164c128ed43d434f7b56264f6cb9852ee6f9fe6 /hw/block/m25p80.c
parentacd9575e59da1bfc21a1feccb00c5dddd45328f7 (diff)
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m25p80: add support for two bytes WRSR for Macronix chips
On Macronix chips, two bytes can written to the WRSR. First byte will configure the status register and the second the configuration register. It is important to save the configuration value as it contains the dummy cycle setting when using dual or quad IO mode. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/block/m25p80.c')
-rw-r--r--hw/block/m25p80.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index a5ccffb..b0ed8fa 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -698,6 +698,7 @@ static void complete_collecting_data(Flash *s)
case MAN_MACRONIX:
s->quad_enable = extract32(s->data[0], 6, 1);
if (s->len > 1) {
+ s->volatile_cfg = s->data[1];
s->four_bytes_address_mode = extract32(s->data[1], 5, 1);
}
break;