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authorMatt Parker <mtparkr@gmail.com>2017-08-27 20:20:38 +0100
committerGerd Hoffmann <kraxel@redhat.com>2017-09-18 13:13:32 +0200
commita6b0bdc8fb4ca57a4274205659bbe91d78c23f22 (patch)
treecc9bc88e2df4de12823d0667b30bd29550687bb8 /hw/audio
parent4bb3893908385836410346725dd9e584dcd24836 (diff)
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audio: intel-hda: do not use old_mmio accesses
intel-hda is currently using the old_mmio accessors for io. This updates the device to use .read and .write accessors instead. Signed-off-by: Matt Parker <mtparkr@gmail.com> Message-id: 20170827192038.28930-1-mtparkr@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/audio')
-rw-r--r--hw/audio/intel-hda.c58
1 files changed, 11 insertions, 47 deletions
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index 06acc98..18a50a8 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -22,6 +22,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
#include "qemu/timer.h"
+#include "qemu/bitops.h"
#include "hw/audio/soundhw.h"
#include "intel-hda.h"
#include "intel-hda-defs.h"
@@ -1043,66 +1044,29 @@ static void intel_hda_regs_reset(IntelHDAState *d)
/* --------------------------------------------------------------------- */
-static void intel_hda_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)
+static void intel_hda_mmio_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
{
IntelHDAState *d = opaque;
const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
- intel_hda_reg_write(d, reg, val, 0xff);
+ intel_hda_reg_write(d, reg, val, MAKE_64BIT_MASK(0, size * 8));
}
-static void intel_hda_mmio_writew(void *opaque, hwaddr addr, uint32_t val)
+static uint64_t intel_hda_mmio_read(void *opaque, hwaddr addr, unsigned size)
{
IntelHDAState *d = opaque;
const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
- intel_hda_reg_write(d, reg, val, 0xffff);
-}
-
-static void intel_hda_mmio_writel(void *opaque, hwaddr addr, uint32_t val)
-{
- IntelHDAState *d = opaque;
- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
-
- intel_hda_reg_write(d, reg, val, 0xffffffff);
-}
-
-static uint32_t intel_hda_mmio_readb(void *opaque, hwaddr addr)
-{
- IntelHDAState *d = opaque;
- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
-
- return intel_hda_reg_read(d, reg, 0xff);
-}
-
-static uint32_t intel_hda_mmio_readw(void *opaque, hwaddr addr)
-{
- IntelHDAState *d = opaque;
- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
-
- return intel_hda_reg_read(d, reg, 0xffff);
-}
-
-static uint32_t intel_hda_mmio_readl(void *opaque, hwaddr addr)
-{
- IntelHDAState *d = opaque;
- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);
-
- return intel_hda_reg_read(d, reg, 0xffffffff);
+ return intel_hda_reg_read(d, reg, MAKE_64BIT_MASK(0, size * 8));
}
static const MemoryRegionOps intel_hda_mmio_ops = {
- .old_mmio = {
- .read = {
- intel_hda_mmio_readb,
- intel_hda_mmio_readw,
- intel_hda_mmio_readl,
- },
- .write = {
- intel_hda_mmio_writeb,
- intel_hda_mmio_writew,
- intel_hda_mmio_writel,
- },
+ .read = intel_hda_mmio_read,
+ .write = intel_hda_mmio_write,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 4,
},
.endianness = DEVICE_NATIVE_ENDIAN,
};