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author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-05 21:06:42 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-01-05 21:06:42 +0000 |
commit | 2e0b5bbe813930021b2baab03c9d424c1c52d18b (patch) | |
tree | d5e5ccd86c2c9b60cf5405f82bf34a99f4590abe /hw/audio/via-ac97.c | |
parent | 52d25464605dc20022ad94aa8bc8e8473e600833 (diff) | |
parent | 457027298749333047bf81a856ce95ea5f9dccd9 (diff) | |
download | qemu-2e0b5bbe813930021b2baab03c9d424c1c52d18b.zip qemu-2e0b5bbe813930021b2baab03c9d424c1c52d18b.tar.gz qemu-2e0b5bbe813930021b2baab03c9d424c1c52d18b.tar.bz2 |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging
MIPS patches queue
- Use PCI macros (Philippe Mathieu-Daudé)
- Clean up VT82C686B south bridge (BALATON Zoltan)
- Introduce clock_ticks_to_ns() (Peter Maydell)
- Add Loongson-3 machine (Huacai Chen)
- Make addresses used by bootloader unsigned (Jiaxun Yang)
- Clean fuloong2e PROM environment (Jiaxun Yang)
- Add integration test of fuloong2e booting Linux (Jiaxun Yang)
# gpg: Signature made Mon 04 Jan 2021 22:37:48 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/mips-20210104: (35 commits)
tests/acceptance: Test boot_linux_console for fuloong2e
hw/mips/fuloong2e: Correct cpuclock in PROM environment
hw/mips/fuloong2e: Remove unused env entry
hw/mips/fuloong2e: Replace faulty documentation links
hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
hw/mips: Use address translation helper to handle ENVP_ADDR
hw/mips/malta: Use address translation helper to calculate bootloader_run_addr
hw/mips: Make bootloader addresses unsigned
docs/system: Update MIPS machine documentation
hw/mips: Add Loongson-3 machine support
hw/mips: Add Loongson-3 boot parameter helpers
hw/mips: Implement fw_cfg_arch_key_name()
hw/intc: Rework Loongson LIOINTC
clock: Define and use new clock_display_freq()
clock: Remove clock_get_ns()
target/mips: Don't use clock_get_ns() in clock period calculation
clock: Introduce clock_ticks_to_ns()
vt82c686: Rename superio config related parts
vt82c686: Use shorter name for local variable holding object state
vt82c686: Remove unneeded includes and defines
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/audio/via-ac97.c')
-rw-r--r-- | hw/audio/via-ac97.c | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c new file mode 100644 index 0000000..6d556f7 --- /dev/null +++ b/hw/audio/via-ac97.c @@ -0,0 +1,93 @@ +/* + * VIA south bridges sound support + * + * This work is licensed under the GNU GPL license version 2 or later. + */ + +/* + * TODO: This is entirely boiler plate just registering empty PCI devices + * with the right ID guests expect, functionality should be added here. + */ + +#include "qemu/osdep.h" +#include "hw/isa/vt82c686.h" +#include "hw/pci/pci.h" + +static void via_ac97_realize(PCIDevice *pci_dev, Error **errp) +{ + pci_set_word(pci_dev->config + PCI_COMMAND, + PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY); + pci_set_word(pci_dev->config + PCI_STATUS, + PCI_STATUS_CAP_LIST | PCI_STATUS_DEVSEL_MEDIUM); + pci_set_long(pci_dev->config + PCI_INTERRUPT_PIN, 0x03); +} + +static void via_ac97_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = via_ac97_realize; + k->vendor_id = PCI_VENDOR_ID_VIA; + k->device_id = PCI_DEVICE_ID_VIA_AC97; + k->revision = 0x50; + k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; + set_bit(DEVICE_CATEGORY_SOUND, dc->categories); + dc->desc = "VIA AC97"; + /* Reason: Part of a south bridge chip */ + dc->user_creatable = false; +} + +static const TypeInfo via_ac97_info = { + .name = TYPE_VIA_AC97, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIDevice), + .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void via_mc97_realize(PCIDevice *pci_dev, Error **errp) +{ + pci_set_word(pci_dev->config + PCI_COMMAND, + PCI_COMMAND_INVALIDATE | PCI_COMMAND_VGA_PALETTE); + pci_set_word(pci_dev->config + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); + pci_set_long(pci_dev->config + PCI_INTERRUPT_PIN, 0x03); +} + +static void via_mc97_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = via_mc97_realize; + k->vendor_id = PCI_VENDOR_ID_VIA; + k->device_id = PCI_DEVICE_ID_VIA_MC97; + k->class_id = PCI_CLASS_COMMUNICATION_OTHER; + k->revision = 0x30; + set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); + dc->desc = "VIA MC97"; + /* Reason: Part of a south bridge chip */ + dc->user_creatable = false; +} + +static const TypeInfo via_mc97_info = { + .name = TYPE_VIA_MC97, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIDevice), + .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void via_ac97_register_types(void) +{ + type_register_static(&via_ac97_info); + type_register_static(&via_mc97_info); +} + +type_init(via_ac97_register_types) |