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author | Peter Maydell <peter.maydell@linaro.org> | 2012-05-02 16:49:41 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-19 13:24:44 +0000 |
commit | 2b518c56a6cb7e58477942896bf626f14a112a90 (patch) | |
tree | f026339b7027275c9a744c95afa92139eee02a5e /hw/armv7m_nvic.c | |
parent | 84e4fccb7f63ee2b9ac82c299d29b2a723479e3d (diff) | |
download | qemu-2b518c56a6cb7e58477942896bf626f14a112a90.zip qemu-2b518c56a6cb7e58477942896bf626f14a112a90.tar.gz qemu-2b518c56a6cb7e58477942896bf626f14a112a90.tar.bz2 |
hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
Remove more NVIC ifdefs by moving the code to setup the CPU interface
memory regions into the GIC specific arm_gic_init() function rather
than the gic_init() function. Rename the latter to more closely
reflect what it's now actually doing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/armv7m_nvic.c')
-rw-r--r-- | hw/armv7m_nvic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 4c130f1..031a7fd 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -449,7 +449,7 @@ static int armv7m_nvic_init(SysBusDevice *dev) s->gic.num_cpu = 1; /* Tell the common code we're an NVIC */ s->gic.revision = 0xffffffff; - gic_init(&s->gic, s->num_irq); + gic_init_irqs_and_distributor(&s->gic, s->num_irq); /* The NVIC and system controller register area looks like this: * 0..0xff : system control registers, including systick * 0x100..0xcff : GIC-like registers |