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| author | Rabin Vincent <rabin@rab.in> | 2010-05-02 15:20:51 +0530 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-05-21 12:00:22 +0200 |
| commit | d6759902cb467c002086853d2eb38fb969c29f7f (patch) | |
| tree | f62f98c19ad44496248f42fa1342cfc10745e4e7 /hw/arm_timer.c | |
| parent | 0b2ec6fcfdad1dd9ce74c50e2d752afbb627b0d0 (diff) | |
| download | qemu-d6759902cb467c002086853d2eb38fb969c29f7f.zip qemu-d6759902cb467c002086853d2eb38fb969c29f7f.tar.gz qemu-d6759902cb467c002086853d2eb38fb969c29f7f.tar.bz2 | |
arm_timer: reload timer when enabled
Reload the timer when TimerControl is written, if the timer is to be
enabled. Otherwise, if an earlier write to TimerLoad was done while
periodic mode was not set, s->delta may incorrectly still have the value
of the maximum limit instead of the value written to TimerLoad.
This problem is evident on versatileap on current linux-next, which
enables TIMER_CTRL_32BIT before writing to TimerLoad and then enabling
periodic mode and starting the timer. This causes the first periodic
tick to be scheduled to occur after 0xffffffff periods, leading to a
perceived hang while the kernel waits for the first timer tick.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/arm_timer.c')
| -rw-r--r-- | hw/arm_timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 9fef191..5b6947a 100644 --- a/hw/arm_timer.c +++ b/hw/arm_timer.c @@ -113,7 +113,7 @@ static void arm_timer_write(void *opaque, target_phys_addr_t offset, case 1: freq >>= 4; break; case 2: freq >>= 8; break; } - arm_timer_recalibrate(s, 0); + arm_timer_recalibrate(s, s->control & TIMER_CTRL_ENABLE); ptimer_set_freq(s->timer, freq); if (s->control & TIMER_CTRL_ENABLE) { /* Restart the timer if still enabled. */ |