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author | Adam Lackorzynski <adam@os.inf.tu-dresden.de> | 2011-03-05 13:51:42 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-03-06 23:37:17 +0100 |
commit | fa25014441dc5fafb8f00eeff44172f073bf379d (patch) | |
tree | 486d7fc8838ec5d873e173d45039e8b12cb5a16f /hw/arm_gic.c | |
parent | 29501f1b9e6b1ee9d5d4761a452116321be5ae95 (diff) | |
download | qemu-fa25014441dc5fafb8f00eeff44172f073bf379d.zip qemu-fa25014441dc5fafb8f00eeff44172f073bf379d.tar.gz qemu-fa25014441dc5fafb8f00eeff44172f073bf379d.tar.bz2 |
target-arm: Fix soft interrupt in GIC distributor
Fix selection of target list filter mode.
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/arm_gic.c')
-rw-r--r-- | hw/arm_gic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e6b1953..0e934ec 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -549,10 +549,10 @@ static void gic_dist_writel(void *opaque, target_phys_addr_t offset, mask = (value >> 16) & ALL_CPU_MASK; break; case 1: - mask = 1 << cpu; + mask = ALL_CPU_MASK ^ (1 << cpu); break; case 2: - mask = ALL_CPU_MASK ^ (1 << cpu); + mask = 1 << cpu; break; default: DPRINTF("Bad Soft Int target filter\n"); |