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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 11:39:09 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 12:29:04 +0000 |
| commit | 0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4 (patch) | |
| tree | a07a35b01cbc82efe42fc82bdfa558385a4f2968 /hw/arm_gic.c | |
| parent | aecff6924dab0197b6c8f132e44502b25fd98a38 (diff) | |
| download | qemu-0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4.zip qemu-0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4.tar.gz qemu-0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4.tar.bz2 | |
hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
Now all the A profile cores have been switched to use the standalone
sysbus GIC, the only remaining code which #includes arm_gic.c is
the v7M NVIC. The coupling is much closer here so it's not so
easily disentangled. For now, add a comment about how arm_gic.c
is compiled, and assume that the NVIC always includes arm_gic.c
and the non-NVIC GIC is always compiled standalone.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm_gic.c')
| -rw-r--r-- | hw/arm_gic.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 81858c3..589ac5e 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -8,8 +8,15 @@ */ /* This file contains implementation code for the RealView EB interrupt - controller, MPCore distributed interrupt controller and ARMv7-M - Nested Vectored Interrupt Controller. */ + * controller, MPCore distributed interrupt controller and ARMv7-M + * Nested Vectored Interrupt Controller. + * It is compiled in two ways: + * (1) as a standalone file to produce a sysbus device which is a GIC + * that can be used on the realview board and as one of the builtin + * private peripherals for the ARM MP CPUs (11MPCore, A9, etc) + * (2) by being directly #included into armv7m_nvic.c to produce the + * armv7m_nvic device. + */ #include "sysbus.h" @@ -909,7 +916,7 @@ static void gic_init(gic_state *s, int num_irq) register_savevm(NULL, "arm_gic", -1, 2, gic_save, gic_load, s); } -#ifndef LEGACY_INCLUDED_GIC +#ifndef NVIC static int arm_gic_init(SysBusDevice *dev) { |