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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-01-29 16:18:26 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-02-02 13:51:58 +0000
commit467c6f84f91c387c56837995cc0293258174efdb (patch)
tree1756489876aa81ed66bd7f13e3bdca379522288b /hw/arm
parent858ab7140db46cfe14f38ce5c0643c289df0a515 (diff)
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hw/arm/npcm7xx_boards: Simplify setting MachineClass::valid_cpu_types[]
The npcm7xx Soc is created with a Cortex-A9 core, see in hw/arm/npcm7xx.c: static void npcm7xx_init(Object *obj) { NPCM7xxState *s = NPCM7XX(obj); for (int i = 0; i < NPCM7XX_MAX_NUM_CPUS; i++) { object_initialize_child(obj, "cpu[*]", &s->cpu[i], ARM_CPU_TYPE_NAME("cortex-a9")); } The MachineClass::default_cpu_type field is ignored: delete it. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-8-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/npcm7xx_boards.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 2999b8b..e229efb 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -465,7 +465,6 @@ static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
mc->no_cdrom = 1;
mc->no_parallel = 1;
mc->default_ram_id = "ram";
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
mc->valid_cpu_types = valid_cpu_types;
}