diff options
author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-10 22:29:47 +0100 |
---|---|---|
committer | Thomas Huth <thuth@redhat.com> | 2023-01-18 11:14:34 +0100 |
commit | 883f2c591fee552067e160208b4fe0228dbabbb1 (patch) | |
tree | 3f3944303bb12228328e7ccace0791159295eef9 /hw/arm | |
parent | 6e6761d8fb640cf3dc58735c050878847eb22fca (diff) | |
download | qemu-883f2c591fee552067e160208b4fe0228dbabbb1.zip qemu-883f2c591fee552067e160208b4fe0228dbabbb1.tar.gz qemu-883f2c591fee552067e160208b4fe0228dbabbb1.tar.bz2 |
bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
The 'hwaddr' type is defined in "exec/hwaddr.h" as:
hwaddr is the type of a physical address
(its size can be different from 'target_ulong').
All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:
$ fgrep define include/exec/hwaddr.h
#define HWADDR_H
#define HWADDR_BITS 64
#define HWADDR_MAX UINT64_MAX
#define TARGET_FMT_plx "%016" PRIx64
^^^^^^
#define HWADDR_PRId PRId64
#define HWADDR_PRIi PRIi64
#define HWADDR_PRIo PRIo64
#define HWADDR_PRIu PRIu64
#define HWADDR_PRIx PRIx64
#define HWADDR_PRIX PRIX64
Since hwaddr's size can be *different* from target_ulong, it is
very confusing to read one of its format using the 'TARGET_FMT_'
prefix, normally used for the target_long / target_ulong types:
$ fgrep TARGET_FMT_ include/exec/cpu-defs.h
#define TARGET_FMT_lx "%08x"
#define TARGET_FMT_ld "%d"
#define TARGET_FMT_lu "%u"
#define TARGET_FMT_lx "%016" PRIx64
#define TARGET_FMT_ld "%" PRId64
#define TARGET_FMT_lu "%" PRIu64
Apparently this format was missed during commit a8170e5e97
("Rename target_phys_addr_t to hwaddr"), so complete it by
doing a bulk-rename with:
$ sed -i -e s/TARGET_FMT_plx/HWADDR_FMT_plx/g $(git grep -l TARGET_FMT_plx)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110212947.34557-1-philmd@linaro.org>
[thuth: Fix some warnings from checkpatch.pl along the way]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/strongarm.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 39b8f01..cc73145 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -151,7 +151,7 @@ static uint64_t strongarm_pic_mem_read(void *opaque, hwaddr offset, case ICPR: return s->pending; default: - printf("%s: Bad register offset 0x" TARGET_FMT_plx "\n", + printf("%s: Bad register offset 0x" HWADDR_FMT_plx "\n", __func__, offset); return 0; } @@ -173,7 +173,7 @@ static void strongarm_pic_mem_write(void *opaque, hwaddr offset, s->int_idle = (value & 1) ? 0 : ~0; break; default: - printf("%s: Bad register offset 0x" TARGET_FMT_plx "\n", + printf("%s: Bad register offset 0x" HWADDR_FMT_plx "\n", __func__, offset); break; } @@ -333,7 +333,7 @@ static uint64_t strongarm_rtc_read(void *opaque, hwaddr addr, ((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) / (1000 * ((s->rttr & 0xffff) + 1)); default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); return 0; } } @@ -375,7 +375,7 @@ static void strongarm_rtc_write(void *opaque, hwaddr addr, break; default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); } } @@ -581,7 +581,7 @@ static uint64_t strongarm_gpio_read(void *opaque, hwaddr offset, return s->status; default: - printf("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset); + printf("%s: Bad offset 0x" HWADDR_FMT_plx "\n", __func__, offset); } return 0; @@ -626,7 +626,7 @@ static void strongarm_gpio_write(void *opaque, hwaddr offset, break; default: - printf("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset); + printf("%s: Bad offset 0x" HWADDR_FMT_plx "\n", __func__, offset); } } @@ -782,7 +782,7 @@ static uint64_t strongarm_ppc_read(void *opaque, hwaddr offset, return s->ppfr | ~0x7f001; default: - printf("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset); + printf("%s: Bad offset 0x" HWADDR_FMT_plx "\n", __func__, offset); } return 0; @@ -817,7 +817,7 @@ static void strongarm_ppc_write(void *opaque, hwaddr offset, break; default: - printf("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset); + printf("%s: Bad offset 0x" HWADDR_FMT_plx "\n", __func__, offset); } } @@ -1164,7 +1164,7 @@ static uint64_t strongarm_uart_read(void *opaque, hwaddr addr, return s->utsr1; default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); return 0; } } @@ -1221,7 +1221,7 @@ static void strongarm_uart_write(void *opaque, hwaddr addr, break; default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); } } @@ -1443,7 +1443,7 @@ static uint64_t strongarm_ssp_read(void *opaque, hwaddr addr, strongarm_ssp_fifo_update(s); return retval; default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); break; } return 0; @@ -1509,7 +1509,7 @@ static void strongarm_ssp_write(void *opaque, hwaddr addr, break; default: - printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); + printf("%s: Bad register 0x" HWADDR_FMT_plx "\n", __func__, addr); break; } } |