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authorFrancisco Iglesias <frasse.iglesias@gmail.com>2017-12-13 17:59:22 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-12-13 17:59:22 +0000
commitbabc1f30090b8541c9669d4ba74eedf0ee2894d8 (patch)
treeaa3b4a124094c2e57f78b7013e2666b53767cb1c /hw/arm/xlnx-zynqmp.c
parentc95997a39de679a1ae29c2f0637ec07f0291fedc (diff)
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xlnx-zcu102: Add support for the ZynqMP QSPI
Add support for the ZynqMP QSPI (consisting of the Generic QSPI and Legacy QSPI) and connect Numonyx n25q512a11 flashes to it. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20171126231634.9531-14-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xlnx-zynqmp.c')
-rw-r--r--hw/arm/xlnx-zynqmp.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index c707c66..3256420 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -40,6 +40,10 @@
#define SATA_ADDR 0xFD0C0000
#define SATA_NUM_PORTS 2
+#define QSPI_ADDR 0xff0f0000
+#define LQSPI_ADDR 0xc0000000
+#define QSPI_IRQ 15
+
#define DP_ADDR 0xfd4a0000
#define DP_IRQ 113
@@ -171,6 +175,9 @@ static void xlnx_zynqmp_init(Object *obj)
qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
}
+ object_initialize(&s->qspi, sizeof(s->qspi), TYPE_XLNX_ZYNQMP_QSPIPS);
+ qdev_set_parent_bus(DEVICE(&s->qspi), sysbus_get_default());
+
object_initialize(&s->dp, sizeof(s->dp), TYPE_XLNX_DP);
qdev_set_parent_bus(DEVICE(&s->dp), sysbus_get_default());
@@ -411,6 +418,25 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
g_free(bus_name);
}
+ object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi), 0, gic_spi[QSPI_IRQ]);
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_BUS; i++) {
+ gchar *bus_name;
+ gchar *target_bus;
+
+ /* Alias controller SPI bus to the SoC itself */
+ bus_name = g_strdup_printf("qspi%d", i);
+ target_bus = g_strdup_printf("spi%d", i);
+ object_property_add_alias(OBJECT(s), bus_name,
+ OBJECT(&s->qspi), target_bus,
+ &error_abort);
+ g_free(bus_name);
+ g_free(target_bus);
+ }
+
object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);
if (err) {
error_propagate(errp, err);