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author | Bin Meng <bin.meng@windriver.com> | 2020-09-01 09:39:07 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:18 -0700 |
commit | dfc388797cc413072e58a8f9a831633f29212448 (patch) | |
tree | 5f724d555e92eacfda103e7eefd48265a73bb0b7 /hw/arm/xilinx_zynq.c | |
parent | 64ac13633fd416541ea00ff4ae973489bdc33f7a (diff) | |
download | qemu-dfc388797cc413072e58a8f9a831633f29212448.zip qemu-dfc388797cc413072e58a8f9a831633f29212448.tar.gz qemu-dfc388797cc413072e58a8f9a831633f29212448.tar.bz2 |
hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
When cadence_gem model was created for Xilinx boards, the PHY address
was hard-coded to 23 in the GEM model. Now that we have introduced a
property we can use that to tell GEM model what our PHY address is.
Change all boards' GEM 'phy-addr' property value to 23, and set the
PHY address default value to 0 in the GEM model.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-13-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/arm/xilinx_zynq.c')
-rw-r--r-- | hw/arm/xilinx_zynq.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 969ef07..9ffcc56 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -119,6 +119,7 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq) qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(dev, nd); } + object_property_set_int(OBJECT(dev), "phy-addr", 23, &error_abort); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, base); |