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| author | Greg Bellows <greg.bellows@linaro.org> | 2014-12-15 17:09:51 -0600 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-12-22 23:12:28 +0000 |
| commit | 61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518 (patch) | |
| tree | 3e354355e481622dd87076aab0435dd6ce9c59c3 /hw/arm/xilinx_zynq.c | |
| parent | 223a72f1179dc0b56bae3b01bc3e3208ef100fcc (diff) | |
| download | qemu-61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518.zip qemu-61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518.tar.gz qemu-61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518.tar.bz2 | |
target-arm: Disable EL3 on unsupported machines
Disables the CPU ARM_FEATURE_EL3 featuere on machine models that can be
configured to use Cortex-A9, Cortex-A15, and ARM1176 but don't officially
support EL3. This preserves backwards compatibility.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1418684992-8996-15-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xilinx_zynq.c')
| -rw-r--r-- | hw/arm/xilinx_zynq.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index b590392..06e6e24 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -126,6 +126,18 @@ static void zynq_init(MachineState *machine) cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc))); + /* By default A9 CPUs have EL3 enabled. This board does not + * currently support EL3 so the CPU EL3 property is disabled before + * realization. + */ + if (object_property_find(OBJECT(cpu), "has_el3", NULL)) { + object_property_set_bool(OBJECT(cpu), false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr", &err); if (err) { error_report("%s", error_get_pretty(err)); |