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author | Steffen Görtz <contrib@steffen-goertz.de> | 2019-01-07 15:23:47 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-07 15:23:47 +0000 |
commit | b39dced66ac2612e89c9c822b6cb7b63c0de7f43 (patch) | |
tree | d361fd6fda67ca16f150ef3efa9984f81ba20344 /hw/arm/nrf51_soc.c | |
parent | 7ec543e4b9d3113f0f7afa49a474d7098abe29f0 (diff) | |
download | qemu-b39dced66ac2612e89c9c822b6cb7b63c0de7f43.zip qemu-b39dced66ac2612e89c9c822b6cb7b63c0de7f43.tar.gz qemu-b39dced66ac2612e89c9c822b6cb7b63c0de7f43.tar.bz2 |
arm: Add Clock peripheral stub to NRF51 SOC
This stubs enables the microbit-micropython firmware to run
on the microbit machine.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20190103091119.9367-12-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/nrf51_soc.c')
-rw-r--r-- | hw/arm/nrf51_soc.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index ef70bd6..1630c27 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -34,6 +34,26 @@ #define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) +static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n", + __func__, addr, size); + return 1; +} + +static void clock_write(void *opaque, hwaddr addr, uint64_t data, + unsigned int size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n", + __func__, addr, data, size); +} + +static const MemoryRegionOps clock_ops = { + .read = clock_read, + .write = clock_write +}; + + static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) { NRF51State *s = NRF51_SOC(dev_soc); @@ -130,6 +150,12 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) BASE_TO_IRQ(base_addr))); } + /* STUB Peripherals */ + memory_region_init_io(&s->clock, NULL, &clock_ops, NULL, + "nrf51_soc.clock", 0x1000); + memory_region_add_subregion_overlap(&s->container, + NRF51_IOMEM_BASE, &s->clock, -1); + create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, |