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author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-28 11:41:30 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-01-29 15:54:42 +0000 |
commit | 13059a3a101f9deb415100286e8b62cc2f4561a3 (patch) | |
tree | d15aa1edcebe1b525646f7af19d00095f249929d /hw/arm/musca.c | |
parent | eeae0b2bf4e69de27a133c87951ce52c6bfdb8b7 (diff) | |
download | qemu-13059a3a101f9deb415100286e8b62cc2f4561a3.zip qemu-13059a3a101f9deb415100286e8b62cc2f4561a3.tar.gz qemu-13059a3a101f9deb415100286e8b62cc2f4561a3.tar.bz2 |
hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ"
While we transition the ARMSSE code from integer properties
specifying clock frequencies to Clock objects, we want to have the
device provide both at once. We want the final name of the main
input Clock to be "MAINCLK", following the hardware name.
Unfortunately creating an input Clock with a name X creates an
under-the-hood QOM property X; for "MAINCLK" this clashes with the
existing UINT32 property of that name.
Rename the UINT32 property to MAINCLK_FRQ so it can coexist with the
MAINCLK Clock; once the transition is complete MAINCLK_FRQ will be
deleted.
Commit created with:
perl -p -i -e 's/MAINCLK/MAINCLK_FRQ/g' hw/arm/{armsse,mps2-tz,musca}.c include/hw/arm/armsse.h
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210128114145.20536-11-peter.maydell@linaro.org
Message-id: 20210121190622.22000-11-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/musca.c')
-rw-r--r-- | hw/arm/musca.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/musca.c b/hw/arm/musca.c index b50157f..d82bef1 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -375,7 +375,7 @@ static void musca_init(MachineState *machine) qdev_prop_set_uint32(ssedev, "EXP_NUMIRQ", mmc->num_irqs); qdev_prop_set_uint32(ssedev, "init-svtor", mmc->init_svtor); qdev_prop_set_uint32(ssedev, "SRAM_ADDR_WIDTH", mmc->sram_addr_width); - qdev_prop_set_uint32(ssedev, "MAINCLK", SYSCLK_FRQ); + qdev_prop_set_uint32(ssedev, "MAINCLK_FRQ", SYSCLK_FRQ); /* * Musca-A takes the default SSE-200 FPU/DSP settings (ie no for * CPU0 and yes for CPU1); Musca-B1 explicitly enables them for CPU0. |