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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-06-17 09:25:31 +0200
committerPeter Maydell <peter.maydell@linaro.org>2020-06-23 11:39:47 +0100
commit75ca834136517a48f838537b10318e68abecaed5 (patch)
treec6ec44b767d5e92c3a546d26bd99ae07bd6196c5 /hw/arm/mps2.c
parent440c9f959d20b83c20c589f614cb14fd0dce4546 (diff)
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hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200617072539.32686-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/mps2.c')
-rw-r--r--hw/arm/mps2.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index daa55f7..ee555f9 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -65,7 +65,9 @@ typedef struct {
MemoryRegion blockram_m2;
MemoryRegion blockram_m3;
MemoryRegion sram;
+ /* FPGA APB subsystem */
MPS2SCC scc;
+ /* CMSDK APB subsystem */
CMSDKAPBDualTimer dualtimer;
} MPS2MachineState;
@@ -299,9 +301,9 @@ static void mps2_common_init(MachineState *machine)
g_assert_not_reached();
}
+ /* CMSDK APB subsystem */
cmsdk_apb_timer_create(0x40000000, qdev_get_gpio_in(armv7m, 8), SYSCLK_FRQ);
cmsdk_apb_timer_create(0x40001000, qdev_get_gpio_in(armv7m, 9), SYSCLK_FRQ);
-
object_initialize_child(OBJECT(mms), "dualtimer", &mms->dualtimer,
TYPE_CMSDK_APB_DUALTIMER);
qdev_prop_set_uint32(DEVICE(&mms->dualtimer), "pclk-frq", SYSCLK_FRQ);
@@ -310,6 +312,7 @@ static void mps2_common_init(MachineState *machine)
qdev_get_gpio_in(armv7m, 10));
sysbus_mmio_map(SYS_BUS_DEVICE(&mms->dualtimer), 0, 0x40002000);
+ /* FPGA APB subsystem */
object_initialize_child(OBJECT(mms), "scc", &mms->scc, TYPE_MPS2_SCC);
sccdev = DEVICE(&mms->scc);
qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2);