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authorPaolo Bonzini <pbonzini@redhat.com>2020-02-25 09:19:00 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2020-02-25 09:19:00 +0100
commitca6155c0f2bd39b4b4162533be401c98bd960820 (patch)
tree7e5212409c90fa40b6a50923557f2083c23637ba /hw/arm/mcimx7d-sabre.c
parentc220cdec4845f305034330f80ce297f1f997f2d3 (diff)
parent9584b564198193bd54f00a01ed7e039d4f03fa31 (diff)
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Merge tag 'patchew/20200219160953.13771-1-imammedo@redhat.com' of https://github.com/patchew-project/qemu into HEAD
This series removes ad hoc RAM allocation API (memory_region_allocate_system_memory) and consolidates it around hostmem backend. It allows to * resolve conflicts between global -mem-prealloc and hostmem's "policy" option, fixing premature allocation before binding policy is applied * simplify complicated memory allocation routines which had to deal with 2 ways to allocate RAM. * reuse hostmem backends of a choice for main RAM without adding extra CLI options to duplicate hostmem features. A recent case was -mem-shared, to enable vhost-user on targets that don't support hostmem backends [1] (ex: s390) * move RAM allocation from individual boards into generic machine code and provide them with prepared MemoryRegion. * clean up deprecated NUMA features which were tied to the old API (see patches) - "numa: remove deprecated -mem-path fallback to anonymous RAM" - (POSTPONED, waiting on libvirt side) "forbid '-numa node,mem' for 5.0 and newer machine types" - (POSTPONED) "numa: remove deprecated implicit RAM distribution between nodes" Introduce a new machine.memory-backend property and wrapper code that aliases global -mem-path and -mem-alloc into automatically created hostmem backend properties (provided memory-backend was not set explicitly given by user). A bulk of trivial patches then follow to incrementally convert individual boards to using machine.memory-backend provided MemoryRegion. Board conversion typically involves: * providing MachineClass::default_ram_size and MachineClass::default_ram_id so generic code could create default backend if user didn't explicitly provide memory-backend or -m options * dropping memory_region_allocate_system_memory() call * using convenience MachineState::ram MemoryRegion, which points to MemoryRegion allocated by ram-memdev On top of that for some boards: * missing ram_size checks are added (typically it were boards with fixed ram size) * ram_size fixups are replaced by checks and hard errors, forcing user to provide correct "-m" values instead of ignoring it and continuing running. After all boards are converted, the old API is removed and memory allocation routines are cleaned up.
Diffstat (limited to 'hw/arm/mcimx7d-sabre.c')
-rw-r--r--hw/arm/mcimx7d-sabre.c25
1 files changed, 9 insertions, 16 deletions
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 0d1f62d..de1e264 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -21,15 +21,10 @@
#include "qemu/error-report.h"
#include "sysemu/qtest.h"
-typedef struct {
- FslIMX7State soc;
- MemoryRegion ram;
-} MCIMX7Sabre;
-
static void mcimx7d_sabre_init(MachineState *machine)
{
static struct arm_boot_info boot_info;
- MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1);
+ FslIMX7State *s;
int i;
if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
@@ -45,15 +40,12 @@ static void mcimx7d_sabre_init(MachineState *machine)
.nb_cpus = machine->smp.cpus,
};
- object_initialize_child(OBJECT(machine), "soc",
- &s->soc, sizeof(s->soc),
- TYPE_FSL_IMX7, &error_fatal, NULL);
- object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
+ s = FSL_IMX7(object_new(TYPE_FSL_IMX7));
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(s), &error_fatal);
+ object_property_set_bool(OBJECT(s), true, "realized", &error_fatal);
- memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram",
- machine->ram_size);
- memory_region_add_subregion(get_system_memory(),
- FSL_IMX7_MMDC_ADDR, &s->ram);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR,
+ machine->ram);
for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
BusState *bus;
@@ -63,7 +55,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
di = drive_get_next(IF_SD);
blk = di ? blk_by_legacy_dinfo(di) : NULL;
- bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus");
+ bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
carddev = qdev_create(bus, TYPE_SD_CARD);
qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
object_property_set_bool(OBJECT(carddev), true,
@@ -71,7 +63,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
}
if (!qtest_enabled()) {
- arm_load_kernel(&s->soc.cpu[0], machine, &boot_info);
+ arm_load_kernel(&s->cpu[0], machine, &boot_info);
}
}
@@ -80,5 +72,6 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)";
mc->init = mcimx7d_sabre_init;
mc->max_cpus = FSL_IMX7_NUM_CPUS;
+ mc->default_ram_id = "mcimx7d-sabre.ram";
}
DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)