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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-01-18 21:06:38 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-26 11:30:49 +0000 |
| commit | d780d056f8acdee73a1c34d95733851d58aecd60 (patch) | |
| tree | 989868f9bfb948b8347ebe4217efad7f598c5528 /hw/arm/fsl-imx6.c | |
| parent | 9ab1cf655867dafb132ccd17db360fa1d606981b (diff) | |
| download | qemu-d780d056f8acdee73a1c34d95733851d58aecd60.zip qemu-d780d056f8acdee73a1c34d95733851d58aecd60.tar.gz qemu-d780d056f8acdee73a1c34d95733851d58aecd60.tar.bz2 | |
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO
IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init()
handler. To allow non-ARM code to raise interrupt on ARM cores,
move they to 'target/arm/cpu-qom.h' which is non-ARM specific and
can be included by any hw/ file.
File list to include the new header generated using:
$ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240118200643.29037-18-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/fsl-imx6.c')
| -rw-r--r-- | hw/arm/fsl-imx6.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index af2e982..42f9058 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -29,6 +29,7 @@ #include "chardev/char.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "target/arm/cpu-qom.h" #define IMX6_ESDHC_CAPABILITIES 0x057834b4 |