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authorCédric Le Goater <clg@kaod.org>2023-03-02 13:57:50 +0100
committerCédric Le Goater <clg@kaod.org>2023-03-02 13:57:50 +0100
commit5aa281d757960ea79190bcfb25294e2499de165e (patch)
treefbd7495bb36e881428a4e73a0572df6cae6e2bd3 /hw/arm/fby35.c
parentef0eb67ec96e03e6016c1e72b208f5fcbb455724 (diff)
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aspeed: Introduce a spi_boot region under the SoC
The default boot address of the Aspeed SoCs is 0x0. For this reason, the FMC flash device contents are remapped by HW on the first 256MB of the address space. In QEMU, this is currently done in the machine init with the setup of a region alias. Move this code to the SoC and introduce an extra container to prepare ground for the boot ROM region which will overlap the FMC flash remapping. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/arm/fby35.c')
-rw-r--r--hw/arm/fby35.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index 90c04bb..f4600c2 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -100,13 +100,7 @@ static void fby35_bmc_init(Fby35State *s)
MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
uint64_t size = memory_region_size(&fl->mmio);
- if (s->mmio_exec) {
- memory_region_init_alias(boot_rom, NULL, "aspeed.boot_rom",
- &fl->mmio, 0, size);
- memory_region_add_subregion(&s->bmc_memory, FBY35_BMC_FIRMWARE_ADDR,
- boot_rom);
- } else {
-
+ if (!s->mmio_exec) {
memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
size, &error_abort);
memory_region_add_subregion(&s->bmc_memory, FBY35_BMC_FIRMWARE_ADDR,