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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2017-07-11 11:21:26 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-11 11:21:26 +0100 |
| commit | 499ca137929418bcc42ce83e2ae06be8242b9cb9 (patch) | |
| tree | c894b794f8c010e97068688d2ae46895aba1f6b2 /hw/arm/exynos4210.c | |
| parent | 3d0bf8dfdfebd7f2ae41b6f220444b8047d6b1ee (diff) | |
| download | qemu-499ca137929418bcc42ce83e2ae06be8242b9cb9.zip qemu-499ca137929418bcc42ce83e2ae06be8242b9cb9.tar.gz qemu-499ca137929418bcc42ce83e2ae06be8242b9cb9.tar.bz2 | |
hw/misc: Add Exynos4210 Pseudo Random Number Generator
Add emulation for Exynos4210 Pseudo Random Number Generator which could
work on fixed seeds or with seeds provided by True Random Number
Generator block inside the SoC.
Implement only the fixed seeds part of it in polling mode (no
interrupts).
Emulation tested with two independent Linux kernel exynos-rng drivers:
1. New kcapi-rng interface (targeting Linux v4.12),
2. Old hwrng inteface
# echo "exynos" > /sys/class/misc/hw_random/rng_current
# dd if=/dev/hwrng of=/dev/null bs=1 count=16
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Message-id: 20170425180609.11004-1-krzk@kernel.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: wrapped a few overlong lines; more efficient implementation
of exynos4210_rng_seed_ready()]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/exynos4210.c')
| -rw-r--r-- | hw/arm/exynos4210.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 0050626..ee851e3 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -87,6 +87,9 @@ /* Clock controller SFR base address */ #define EXYNOS4210_CLK_BASE_ADDR 0x10030000 +/* PRNG/HASH SFR base address */ +#define EXYNOS4210_RNG_BASE_ADDR 0x10830400 + /* Display controllers (FIMD) */ #define EXYNOS4210_FIMD0_BASE_ADDR 0x11C00000 @@ -305,6 +308,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) sysbus_create_simple("exynos4210.pmu", EXYNOS4210_PMU_BASE_ADDR, NULL); sysbus_create_simple("exynos4210.clk", EXYNOS4210_CLK_BASE_ADDR, NULL); + sysbus_create_simple("exynos4210.rng", EXYNOS4210_RNG_BASE_ADDR, NULL); /* PWM */ sysbus_create_varargs("exynos4210.pwm", EXYNOS4210_PWM_BASE_ADDR, |