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author | Peter Delevoryas <pdel@fb.com> | 2021-09-20 08:50:59 +0200 |
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committer | Cédric Le Goater <clg@kaod.org> | 2021-09-20 08:50:59 +0200 |
commit | 5d63d0c76c403d7fafc9e83e419b2059278ed396 (patch) | |
tree | acdfcc47066848a498f47f96e7d749cfba72ac30 /hw/arm/aspeed.c | |
parent | 9dca45568331eb80111360619a491a3192cdc63d (diff) | |
download | qemu-5d63d0c76c403d7fafc9e83e419b2059278ed396.zip qemu-5d63d0c76c403d7fafc9e83e419b2059278ed396.tar.gz qemu-5d63d0c76c403d7fafc9e83e419b2059278ed396.tar.bz2 |
hw/arm/aspeed: Allow machine to set UART default
When you run QEMU with an Aspeed machine and a single serial device
using stdio like this:
qemu -machine ast2600-evb -drive ... -serial stdio
The guest OS can read and write to the UART5 registers at 0x1E784000 and
it will receive from stdin and write to stdout. The Aspeed SoC's have a
lot more UART's though (AST2500 has 5, AST2600 has 13) and depending on
the board design, may be using any of them as the serial console. (See
"stdout-path" in a DTS to check which one is chosen).
Most boards, including all of those currently defined in
hw/arm/aspeed.c, just use UART5, but some use UART1. This change adds
some flexibility for different boards without requiring users to change
their command-line invocation of QEMU.
I tested this doesn't break existing code by booting an AST2500 OpenBMC
image and an AST2600 OpenBMC image, each using UART5 as the console.
Then I tested switching the default to UART1 and booting an AST2600
OpenBMC image that uses UART1, and that worked too.
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210901153615.2746885-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/arm/aspeed.c')
-rw-r--r-- | hw/arm/aspeed.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 886e599..7a94593 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -350,6 +350,8 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key", ASPEED_SCU_PROT_KEY, &error_abort); } + qdev_prop_set_uint32(DEVICE(&bmc->soc), "uart-default", + amc->uart_default); qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); memory_region_add_subregion(get_system_memory(), @@ -848,6 +850,7 @@ static void aspeed_machine_class_init(ObjectClass *oc, void *data) mc->no_parallel = 1; mc->default_ram_id = "ram"; amc->macs_mask = ASPEED_MAC0_ON; + amc->uart_default = ASPEED_DEV_UART5; aspeed_machine_class_props_init(oc); } |