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author | Cédric Le Goater <clg@kaod.org> | 2019-07-01 17:26:17 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-07-01 17:28:59 +0100 |
commit | ad1a9782186d0ed1c02eb008f268d34599a54a42 (patch) | |
tree | f6e3e89a842f1fecf657f8a2bced0c47856a0951 /hw/arm/aspeed.c | |
parent | 026498a8f19fec9cbdc7dd3857d53b794be02e2e (diff) | |
download | qemu-ad1a9782186d0ed1c02eb008f268d34599a54a42.zip qemu-ad1a9782186d0ed1c02eb008f268d34599a54a42.tar.gz qemu-ad1a9782186d0ed1c02eb008f268d34599a54a42.tar.bz2 |
aspeed: add a RAM memory region container
The RAM memory region is defined after the SoC is realized when the
SDMC controller has checked that the defined RAM size for the machine
is correct. This is problematic for controller models requiring a link
on the RAM region, for DMA support in the SMC controller for instance.
Introduce a container memory region for the RAM that we can link into
the controllers early, before the SoC is realized. It will be
populated with the RAM region after the checks have be done.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190618165311.27066-14-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/aspeed.c')
-rw-r--r-- | hw/arm/aspeed.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 5d73267..7f01df1 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -33,6 +33,7 @@ static struct arm_boot_info aspeed_board_binfo = { struct AspeedBoardState { AspeedSoCState soc; + MemoryRegion ram_container; MemoryRegion ram; MemoryRegion max_ram; }; @@ -159,6 +160,10 @@ static void aspeed_board_init(MachineState *machine, ram_addr_t max_ram_size; bmc = g_new0(AspeedBoardState, 1); + + memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container", + UINT32_MAX); + object_initialize_child(OBJECT(machine), "soc", &bmc->soc, (sizeof(bmc->soc)), cfg->soc_name, &error_abort, NULL); @@ -193,16 +198,16 @@ static void aspeed_board_init(MachineState *machine, &error_abort); memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); + memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram); memory_region_add_subregion(get_system_memory(), - sc->info->memmap[ASPEED_SDRAM], &bmc->ram); + sc->info->memmap[ASPEED_SDRAM], + &bmc->ram_container); max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", &error_abort); memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL, "max_ram", max_ram_size - ram_size); - memory_region_add_subregion(get_system_memory(), - sc->info->memmap[ASPEED_SDRAM] + ram_size, - &bmc->max_ram); + memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram); aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort); aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort); |