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authorStrahinja Jankovic <strahinjapjankovic@gmail.com>2022-12-26 23:02:57 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-01-12 16:50:19 +0000
commit423ec28bb8c20d9dfa68faef50699772899ab64d (patch)
tree8a93047a943d27c7322b3ed6fd4970c408670b96 /hw/arm/Kconfig
parentee5bffa9fce10a3b191fe35279e2460e0a1ba320 (diff)
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hw/misc: Allwinner-A10 Clock Controller Module Emulation
During SPL boot several Clock Controller Module (CCM) registers are read, most important are PLL and Tuning, as well as divisor registers. This patch adds these registers and initializes reset values from user's guide. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-2-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/Kconfig')
-rw-r--r--hw/arm/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 9143533..2be618f 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -323,6 +323,7 @@ config ALLWINNER_A10
select AHCI
select ALLWINNER_A10_PIT
select ALLWINNER_A10_PIC
+ select ALLWINNER_A10_CCM
select ALLWINNER_EMAC
select SERIAL
select UNIMP