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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-21 17:29:00 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-30 13:42:10 +0100 |
| commit | b355f08a3724d3f29e1c177dde3a01b649108f98 (patch) | |
| tree | 5d0132c7d6705945169cf6810d37acddbe07d568 /gdb-xml/arm-vfp3.xml | |
| parent | 89f4f20e276e6e5dc08fca5e75e2bfbd92280072 (diff) | |
| download | qemu-b355f08a3724d3f29e1c177dde3a01b649108f98.zip qemu-b355f08a3724d3f29e1c177dde3a01b649108f98.tar.gz qemu-b355f08a3724d3f29e1c177dde3a01b649108f98.tar.bz2 | |
target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML
Currently we send VFP XML which includes D0..D15 or D0..D31, plus
FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its
definition of this XML feature does not include FPSID or FPEXC. In
particular, for M-profile cores there are no FPSID or FPEXC
registers, so advertising those is wrong.
Move FPSID and FPEXC into their own bit of XML which we only send for
A and R profile cores. This brings our definition of the XML
org.gnu.gdb.arm.vfp feature into line with GDB's own (at least for
non-Neon cores...) and means we don't claim to have FPSID and FPEXC
on M-profile.
(It seems unlikely to me that any gdbstub users really care about
being able to look at FPEXC and FPSID; but we've supplied them to gdb
for a decade and it's not hard to keep doing so.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210921162901.17508-5-peter.maydell@linaro.org
Diffstat (limited to 'gdb-xml/arm-vfp3.xml')
| -rw-r--r-- | gdb-xml/arm-vfp3.xml | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/gdb-xml/arm-vfp3.xml b/gdb-xml/arm-vfp3.xml index 227afd8..ef391c7 100644 --- a/gdb-xml/arm-vfp3.xml +++ b/gdb-xml/arm-vfp3.xml @@ -39,7 +39,5 @@ <reg name="d30" bitsize="64" type="float"/> <reg name="d31" bitsize="64" type="float"/> - <reg name="fpsid" bitsize="32" type="int" group="float"/> <reg name="fpscr" bitsize="32" type="int" group="float"/> - <reg name="fpexc" bitsize="32" type="int" group="float"/> </feature> |