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authorRichard Henderson <richard.henderson@linaro.org>2020-11-14 16:52:38 -0800
committerRichard Henderson <richard.henderson@linaro.org>2021-06-03 13:59:34 -0700
commite1c4667a9b91b1500e47f4cbb4e43a36136e6d29 (patch)
treeed091608ea2fe0b859f757f001eeef7f92e0bd24 /fpu
parent37c954a1b96a65d836705a6e530eeab58cc9d964 (diff)
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softfloat: Move minmax_flags to softfloat-parts.c.inc
Rename to parts$N_minmax. Combine 3 bool arguments to a bitmask. Introduce ftype_minmax functions as a common optimization point. Fold bfloat16 expansions into the same macro as the other types. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-parts.c.inc80
-rw-r--r--fpu/softfloat.c206
2 files changed, 156 insertions, 130 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index 2eb7bb9..b909476 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -938,3 +938,83 @@ static void partsN(uint_to_float)(FloatPartsN *p, uint64_t a,
p->frac_hi = a << shift;
}
}
+
+/*
+ * Float min/max.
+ */
+static FloatPartsN *partsN(minmax)(FloatPartsN *a, FloatPartsN *b,
+ float_status *s, int flags)
+{
+ int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);
+ int a_exp, b_exp, cmp;
+
+ if (unlikely(ab_mask & float_cmask_anynan)) {
+ /*
+ * For minnum/maxnum, if one operand is a QNaN, and the other
+ * operand is numerical, then return numerical argument.
+ */
+ if ((flags & minmax_isnum)
+ && !(ab_mask & float_cmask_snan)
+ && (ab_mask & ~float_cmask_qnan)) {
+ return is_nan(a->cls) ? b : a;
+ }
+ return parts_pick_nan(a, b, s);
+ }
+
+ a_exp = a->exp;
+ b_exp = b->exp;
+
+ if (unlikely(ab_mask != float_cmask_normal)) {
+ switch (a->cls) {
+ case float_class_normal:
+ break;
+ case float_class_inf:
+ a_exp = INT16_MAX;
+ break;
+ case float_class_zero:
+ a_exp = INT16_MIN;
+ break;
+ default:
+ g_assert_not_reached();
+ break;
+ }
+ switch (b->cls) {
+ case float_class_normal:
+ break;
+ case float_class_inf:
+ b_exp = INT16_MAX;
+ break;
+ case float_class_zero:
+ b_exp = INT16_MIN;
+ break;
+ default:
+ g_assert_not_reached();
+ break;
+ }
+ }
+
+ /* Compare magnitudes. */
+ cmp = a_exp - b_exp;
+ if (cmp == 0) {
+ cmp = frac_cmp(a, b);
+ }
+
+ /*
+ * Take the sign into account.
+ * For ismag, only do this if the magnitudes are equal.
+ */
+ if (!(flags & minmax_ismag) || cmp == 0) {
+ if (a->sign != b->sign) {
+ /* For differing signs, the negative operand is less. */
+ cmp = a->sign ? -1 : 1;
+ } else if (a->sign) {
+ /* For two negative operands, invert the magnitude comparison. */
+ cmp = -cmp;
+ }
+ }
+
+ if (flags & minmax_ismin) {
+ cmp = -cmp;
+ }
+ return cmp < 0 ? b : a;
+}
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index db14bd0..ef750e1 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -482,6 +482,15 @@ enum {
float_cmask_anynan = float_cmask_qnan | float_cmask_snan,
};
+/* Flags for parts_minmax. */
+enum {
+ /* Set for minimum; clear for maximum. */
+ minmax_ismin = 1,
+ /* Set for the IEEE 754-2008 minNum() and maxNum() operations. */
+ minmax_isnum = 2,
+ /* Set for the IEEE 754-2008 minNumMag() and minNumMag() operations. */
+ minmax_ismag = 4,
+};
/* Simple helpers for checking if, or what kind of, NaN we have */
static inline __attribute__((unused)) bool is_nan(FloatClass c)
@@ -865,6 +874,14 @@ static void parts128_uint_to_float(FloatParts128 *p, uint64_t a,
#define parts_uint_to_float(P, I, Z, S) \
PARTS_GENERIC_64_128(uint_to_float, P)(P, I, Z, S)
+static FloatParts64 *parts64_minmax(FloatParts64 *a, FloatParts64 *b,
+ float_status *s, int flags);
+static FloatParts128 *parts128_minmax(FloatParts128 *a, FloatParts128 *b,
+ float_status *s, int flags);
+
+#define parts_minmax(A, B, S, F) \
+ PARTS_GENERIC_64_128(minmax, A)(A, B, S, F)
+
/*
* Helper functions for softfloat-parts.c.inc, per-size operations.
*/
@@ -3258,145 +3275,74 @@ float128 uint64_to_float128(uint64_t a, float_status *status)
return float128_round_pack_canonical(&p, status);
}
-/* Float Min/Max */
-/* min() and max() functions. These can't be implemented as
- * 'compare and pick one input' because that would mishandle
- * NaNs and +0 vs -0.
- *
- * minnum() and maxnum() functions. These are similar to the min()
- * and max() functions but if one of the arguments is a QNaN and
- * the other is numerical then the numerical argument is returned.
- * SNaNs will get quietened before being returned.
- * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
- * and maxNum() operations. min() and max() are the typical min/max
- * semantics provided by many CPUs which predate that specification.
- *
- * minnummag() and maxnummag() functions correspond to minNumMag()
- * and minNumMag() from the IEEE-754 2008.
+/*
+ * Minimum and maximum
*/
-static FloatParts64 minmax_floats(FloatParts64 a, FloatParts64 b, bool ismin,
- bool ieee, bool ismag, float_status *s)
-{
- if (unlikely(is_nan(a.cls) || is_nan(b.cls))) {
- if (ieee) {
- /* Takes two floating-point values `a' and `b', one of
- * which is a NaN, and returns the appropriate NaN
- * result. If either `a' or `b' is a signaling NaN,
- * the invalid exception is raised.
- */
- if (is_snan(a.cls) || is_snan(b.cls)) {
- return *parts_pick_nan(&a, &b, s);
- } else if (is_nan(a.cls) && !is_nan(b.cls)) {
- return b;
- } else if (is_nan(b.cls) && !is_nan(a.cls)) {
- return a;
- }
- }
- return *parts_pick_nan(&a, &b, s);
- } else {
- int a_exp, b_exp;
- switch (a.cls) {
- case float_class_normal:
- a_exp = a.exp;
- break;
- case float_class_inf:
- a_exp = INT_MAX;
- break;
- case float_class_zero:
- a_exp = INT_MIN;
- break;
- default:
- g_assert_not_reached();
- break;
- }
- switch (b.cls) {
- case float_class_normal:
- b_exp = b.exp;
- break;
- case float_class_inf:
- b_exp = INT_MAX;
- break;
- case float_class_zero:
- b_exp = INT_MIN;
- break;
- default:
- g_assert_not_reached();
- break;
- }
+static float16 float16_minmax(float16 a, float16 b, float_status *s, int flags)
+{
+ FloatParts64 pa, pb, *pr;
- if (ismag && (a_exp != b_exp || a.frac != b.frac)) {
- bool a_less = a_exp < b_exp;
- if (a_exp == b_exp) {
- a_less = a.frac < b.frac;
- }
- return a_less ^ ismin ? b : a;
- }
+ float16_unpack_canonical(&pa, a, s);
+ float16_unpack_canonical(&pb, b, s);
+ pr = parts_minmax(&pa, &pb, s, flags);
- if (a.sign == b.sign) {
- bool a_less = a_exp < b_exp;
- if (a_exp == b_exp) {
- a_less = a.frac < b.frac;
- }
- return a.sign ^ a_less ^ ismin ? b : a;
- } else {
- return a.sign ^ ismin ? b : a;
- }
- }
+ return float16_round_pack_canonical(pr, s);
}
-#define MINMAX(sz, name, ismin, isiee, ismag) \
-float ## sz float ## sz ## _ ## name(float ## sz a, float ## sz b, \
- float_status *s) \
-{ \
- FloatParts64 pa, pb, pr; \
- float ## sz ## _unpack_canonical(&pa, a, s); \
- float ## sz ## _unpack_canonical(&pb, b, s); \
- pr = minmax_floats(pa, pb, ismin, isiee, ismag, s); \
- return float ## sz ## _round_pack_canonical(&pr, s); \
-}
-
-MINMAX(16, min, true, false, false)
-MINMAX(16, minnum, true, true, false)
-MINMAX(16, minnummag, true, true, true)
-MINMAX(16, max, false, false, false)
-MINMAX(16, maxnum, false, true, false)
-MINMAX(16, maxnummag, false, true, true)
-
-MINMAX(32, min, true, false, false)
-MINMAX(32, minnum, true, true, false)
-MINMAX(32, minnummag, true, true, true)
-MINMAX(32, max, false, false, false)
-MINMAX(32, maxnum, false, true, false)
-MINMAX(32, maxnummag, false, true, true)
-
-MINMAX(64, min, true, false, false)
-MINMAX(64, minnum, true, true, false)
-MINMAX(64, minnummag, true, true, true)
-MINMAX(64, max, false, false, false)
-MINMAX(64, maxnum, false, true, false)
-MINMAX(64, maxnummag, false, true, true)
-
-#undef MINMAX
-
-#define BF16_MINMAX(name, ismin, isiee, ismag) \
-bfloat16 bfloat16_ ## name(bfloat16 a, bfloat16 b, float_status *s) \
-{ \
- FloatParts64 pa, pb, pr; \
- bfloat16_unpack_canonical(&pa, a, s); \
- bfloat16_unpack_canonical(&pb, b, s); \
- pr = minmax_floats(pa, pb, ismin, isiee, ismag, s); \
- return bfloat16_round_pack_canonical(&pr, s); \
+static bfloat16 bfloat16_minmax(bfloat16 a, bfloat16 b,
+ float_status *s, int flags)
+{
+ FloatParts64 pa, pb, *pr;
+
+ bfloat16_unpack_canonical(&pa, a, s);
+ bfloat16_unpack_canonical(&pb, b, s);
+ pr = parts_minmax(&pa, &pb, s, flags);
+
+ return bfloat16_round_pack_canonical(pr, s);
}
-BF16_MINMAX(min, true, false, false)
-BF16_MINMAX(minnum, true, true, false)
-BF16_MINMAX(minnummag, true, true, true)
-BF16_MINMAX(max, false, false, false)
-BF16_MINMAX(maxnum, false, true, false)
-BF16_MINMAX(maxnummag, false, true, true)
+static float32 float32_minmax(float32 a, float32 b, float_status *s, int flags)
+{
+ FloatParts64 pa, pb, *pr;
+
+ float32_unpack_canonical(&pa, a, s);
+ float32_unpack_canonical(&pb, b, s);
+ pr = parts_minmax(&pa, &pb, s, flags);
+
+ return float32_round_pack_canonical(pr, s);
+}
+
+static float64 float64_minmax(float64 a, float64 b, float_status *s, int flags)
+{
+ FloatParts64 pa, pb, *pr;
+
+ float64_unpack_canonical(&pa, a, s);
+ float64_unpack_canonical(&pb, b, s);
+ pr = parts_minmax(&pa, &pb, s, flags);
+
+ return float64_round_pack_canonical(pr, s);
+}
+
+#define MINMAX_1(type, name, flags) \
+ type type##_##name(type a, type b, float_status *s) \
+ { return type##_minmax(a, b, s, flags); }
+
+#define MINMAX_2(type) \
+ MINMAX_1(type, max, 0) \
+ MINMAX_1(type, maxnum, minmax_isnum) \
+ MINMAX_1(type, maxnummag, minmax_isnum | minmax_ismag) \
+ MINMAX_1(type, min, minmax_ismin) \
+ MINMAX_1(type, minnum, minmax_ismin | minmax_isnum) \
+ MINMAX_1(type, minnummag, minmax_ismin | minmax_isnum | minmax_ismag)
+
+MINMAX_2(float16)
+MINMAX_2(bfloat16)
+MINMAX_2(float32)
+MINMAX_2(float64)
-#undef BF16_MINMAX
+#undef MINMAX_1
+#undef MINMAX_2
/* Floating point compare */
static FloatRelation compare_floats(FloatParts64 a, FloatParts64 b, bool is_quiet,