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authorMax Filippov <jcmvbkbc@gmail.com>2020-06-30 19:35:57 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2020-08-21 12:48:14 -0700
commit913602e3ffe6bf50b869a14028a55cb267645ba3 (patch)
tree45be64d9ad89eba35b0304adb8c5de58777ecdcc /fpu
parentcc43c6925113c5bc8f1a0205375931d2e4807c99 (diff)
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softfloat: pass float_status pointer to pickNaN
Pass float_status structure pointer to the pickNaN so that machine-specific settings are available to NaN selection code. Add use_first_nan property to float_status and use it in Xtensa-specific pickNaN. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-specialize.c.inc30
-rw-r--r--fpu/softfloat.c2
2 files changed, 25 insertions, 7 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index 08b6c88..efbd163 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -380,7 +380,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
*----------------------------------------------------------------------------*/
static int pickNaN(FloatClass a_cls, FloatClass b_cls,
- bool aIsLargerSignificand)
+ bool aIsLargerSignificand, float_status *status)
{
#if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA)
/* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
@@ -413,7 +413,7 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
} else {
return 1;
}
-#elif defined(TARGET_PPC) || defined(TARGET_XTENSA) || defined(TARGET_M68K)
+#elif defined(TARGET_PPC) || defined(TARGET_M68K)
/* PowerPC propagation rules:
* 1. A if it sNaN or qNaN
* 2. B if it sNaN or qNaN
@@ -438,6 +438,24 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
} else {
return 1;
}
+#elif defined(TARGET_XTENSA)
+ /*
+ * Xtensa has two NaN propagation modes.
+ * Which one is active is controlled by float_status::use_first_nan.
+ */
+ if (status->use_first_nan) {
+ if (is_nan(a_cls)) {
+ return 0;
+ } else {
+ return 1;
+ }
+ } else {
+ if (is_nan(b_cls)) {
+ return 1;
+ } else {
+ return 0;
+ }
+ }
#else
/* This implements x87 NaN propagation rules:
* SNaN + QNaN => return the QNaN
@@ -625,7 +643,7 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
aIsLargerSignificand = (av < bv) ? 1 : 0;
}
- if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) {
+ if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
if (is_snan(b_cls)) {
return float32_silence_nan(b, status);
}
@@ -763,7 +781,7 @@ static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
aIsLargerSignificand = (av < bv) ? 1 : 0;
}
- if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) {
+ if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
if (is_snan(b_cls)) {
return float64_silence_nan(b, status);
}
@@ -927,7 +945,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
}
- if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) {
+ if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
if (is_snan(b_cls)) {
return floatx80_silence_nan(b, status);
}
@@ -1075,7 +1093,7 @@ static float128 propagateFloat128NaN(float128 a, float128 b,
aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
}
- if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) {
+ if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
if (is_snan(b_cls)) {
return float128_silence_nan(b, status);
}
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 5dce791e..33abc82 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -881,7 +881,7 @@ static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s)
} else {
if (pickNaN(a.cls, b.cls,
a.frac > b.frac ||
- (a.frac == b.frac && a.sign < b.sign))) {
+ (a.frac == b.frac && a.sign < b.sign), s)) {
a = b;
}
if (is_snan(a.cls)) {