diff options
author | Christophe Lyon <christophe.lyon@st.com> | 2011-02-21 17:38:44 +0100 |
---|---|---|
committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-02-24 08:53:36 +0100 |
commit | 8559666ddb50a721bee06d281d5fa87ef44749ba (patch) | |
tree | 911fd8e10c5729f74ce111728c83f9eed0c1e50f /fpu/softfloat.h | |
parent | fb1ba03ab064ae2e2e8248df81a7cad805dbe9d8 (diff) | |
download | qemu-8559666ddb50a721bee06d281d5fa87ef44749ba.zip qemu-8559666ddb50a721bee06d281d5fa87ef44749ba.tar.gz qemu-8559666ddb50a721bee06d281d5fa87ef44749ba.tar.bz2 |
softfloat: move all default NaN definitions to softfloat.h.
These special values are needed to implement some helper functions,
which return/use these values in some cases.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'fpu/softfloat.h')
-rw-r--r-- | fpu/softfloat.h | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/fpu/softfloat.h b/fpu/softfloat.h index e57ee1e..f34a938 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -77,6 +77,12 @@ typedef int64_t sbits64; #define LIT64( a ) a##LL #define INLINE static inline +#if defined(TARGET_MIPS) || defined(TARGET_SH4) +#define SNAN_BIT_IS_ONE 1 +#else +#define SNAN_BIT_IS_ONE 0 +#endif + /*---------------------------------------------------------------------------- | The macro `FLOATX80' must be defined to enable the extended double-precision | floating-point format `floatx80'. If this macro is not defined, the @@ -278,6 +284,17 @@ int float16_is_signaling_nan( float16 ); float16 float16_maybe_silence_nan( float16 ); /*---------------------------------------------------------------------------- +| The pattern for a default generated half-precision NaN. +*----------------------------------------------------------------------------*/ +#if defined(TARGET_ARM) +#define float16_default_nan make_float16(0x7E00) +#elif SNAN_BIT_IS_ONE +#define float16_default_nan make_float16(0x7DFF) +#else +#define float16_default_nan make_float16(0xFE00) +#endif + +/*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); @@ -366,6 +383,20 @@ INLINE int float32_is_zero_or_denormal(float32 a) #define float32_one make_float32(0x3f800000) #define float32_ln2 make_float32(0x3f317218) + +/*---------------------------------------------------------------------------- +| The pattern for a default generated single-precision NaN. +*----------------------------------------------------------------------------*/ +#if defined(TARGET_SPARC) +#define float32_default_nan make_float32(0x7FFFFFFF) +#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) +#define float32_default_nan make_float32(0x7FC00000) +#elif SNAN_BIT_IS_ONE +#define float32_default_nan make_float32(0x7FBFFFFF) +#else +#define float32_default_nan make_float32(0xFFC00000) +#endif + /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ @@ -452,6 +483,19 @@ INLINE int float64_is_any_nan(float64 a) #define float64_one make_float64(0x3ff0000000000000LL) #define float64_ln2 make_float64(0x3fe62e42fefa39efLL) +/*---------------------------------------------------------------------------- +| The pattern for a default generated double-precision NaN. +*----------------------------------------------------------------------------*/ +#if defined(TARGET_SPARC) +#define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF )) +#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) +#define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 )) +#elif SNAN_BIT_IS_ONE +#define float64_default_nan make_float64(LIT64( 0x7FF7FFFFFFFFFFFF )) +#else +#define float64_default_nan make_float64(LIT64( 0xFFF8000000000000 )) +#endif + #ifdef FLOATX80 /*---------------------------------------------------------------------------- @@ -520,6 +564,19 @@ INLINE int floatx80_is_any_nan(floatx80 a) return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1); } +/*---------------------------------------------------------------------------- +| The pattern for a default generated extended double-precision NaN. The +| `high' and `low' values hold the most- and least-significant bits, +| respectively. +*----------------------------------------------------------------------------*/ +#if SNAN_BIT_IS_ONE +#define floatx80_default_nan_high 0x7FFF +#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) +#else +#define floatx80_default_nan_high 0xFFFF +#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) +#endif + #endif #ifdef FLOAT128 @@ -593,6 +650,18 @@ INLINE int float128_is_any_nan(float128 a) ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0)); } +/*---------------------------------------------------------------------------- +| The pattern for a default generated quadruple-precision NaN. The `high' and +| `low' values hold the most- and least-significant bits, respectively. +*----------------------------------------------------------------------------*/ +#if SNAN_BIT_IS_ONE +#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) +#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) +#else +#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) +#define float128_default_nan_low LIT64( 0x0000000000000000 ) +#endif + #endif #else /* CONFIG_SOFTFLOAT */ |