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| author | Alex Bennée <alex.bennee@linaro.org> | 2021-02-13 13:03:18 +0000 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2021-02-18 08:19:23 +0000 |
| commit | bc662a33514ac862efefc73d6caa4e71581ccdae (patch) | |
| tree | dd25f6267aafcaecb42bbbe0ac945e60afa13a1e /dump | |
| parent | 4c134d07b9e584d2713d7b5d0fb5fdb752ad120c (diff) | |
| download | qemu-bc662a33514ac862efefc73d6caa4e71581ccdae.zip qemu-bc662a33514ac862efefc73d6caa4e71581ccdae.tar.gz qemu-bc662a33514ac862efefc73d6caa4e71581ccdae.tar.bz2 | |
accel/tcg: actually cache our partial icount TB
When we exit a block under icount with instructions left to execute we
might need a shorter than normal block to take us to the next
deterministic event. Instead of creating a throwaway block on demand
we use the existing compile flags mechanism to ensure we fetch (or
compile and fetch) a block with exactly the number of instructions we
need.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210213130325.14781-17-alex.bennee@linaro.org>
Diffstat (limited to 'dump')
0 files changed, 0 insertions, 0 deletions