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authorCédric Le Goater <clg@kaod.org>2019-11-19 15:11:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-12-16 10:46:34 +0000
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parent6054fc73e8f4acaafa63b4616e39414e53bce9a9 (diff)
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aspeed/i2c: Check SRAM enablement on AST2500
The SRAM must be enabled before using the Buffer Pool mode or the DMA mode. This is not required on other SoCs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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