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| author | Bin Meng <bin.meng@windriver.com> | 2020-06-08 07:17:31 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-06-19 08:24:07 -0700 |
| commit | 894944624bd986383ff403368bdae902ec97cc57 (patch) | |
| tree | a41941758fc5f34d2005a0d2c5e8127f0ac9c457 /docs/defs.rst.inc | |
| parent | 8f8c6c1a6420483af93fe1fbeb14c5aa8f104c8d (diff) | |
| download | qemu-894944624bd986383ff403368bdae902ec97cc57.zip qemu-894944624bd986383ff403368bdae902ec97cc57.tar.gz qemu-894944624bd986383ff403368bdae902ec97cc57.tar.bz2 | |
hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions
This was done in the virt & sifive_u codes, but opentitan codes were
missed. Remove the riscv_ prefix of the machine* and soc* functions.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-3-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-3-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'docs/defs.rst.inc')
0 files changed, 0 insertions, 0 deletions