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author | Stefan Weil <sw@weilnetz.de> | 2016-11-19 20:23:03 +0100 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2017-01-31 10:10:12 +1100 |
commit | bd97a59eeccc732fc67a821eeacafda8cf23b2f2 (patch) | |
tree | 5ceb47c8125956ef3998a137e555beb96789c82f /disas/ppc.c | |
parent | a0def594286d9110a6035e02eef558cf3cf5d847 (diff) | |
download | qemu-bd97a59eeccc732fc67a821eeacafda8cf23b2f2.zip qemu-bd97a59eeccc732fc67a821eeacafda8cf23b2f2.tar.gz qemu-bd97a59eeccc732fc67a821eeacafda8cf23b2f2.tar.bz2 |
disas/ppc: Fix indefinite articles in comments
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'disas/ppc.c')
-rw-r--r-- | disas/ppc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/disas/ppc.c b/disas/ppc.c index ed7e0d0..5ab9c35 100644 --- a/disas/ppc.c +++ b/disas/ppc.c @@ -1653,11 +1653,11 @@ extract_tbr (unsigned long insn, #define BBOYBI_MASK (BBOYCB_MASK | BI_MASK) #define BBOATBI_MASK (BBOAT2CB_MASK | BI_MASK) -/* An Context form instruction. */ +/* A Context form instruction. */ #define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7)) #define CTX_MASK CTX(0x3f, 0x7) -/* An User Context form instruction. */ +/* A User Context form instruction. */ #define UCTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f)) #define UCTX_MASK UCTX(0x3f, 0x1f) @@ -1710,19 +1710,19 @@ extract_tbr (unsigned long insn, #define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1)) #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1) -/* An VX form instruction. */ +/* A VX form instruction. */ #define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff)) /* The mask for an VX form instruction. */ #define VX_MASK VX(0x3f, 0x7ff) -/* An VA form instruction. */ +/* A VA form instruction. */ #define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f)) -/* The mask for an VA form instruction. */ +/* The mask for a VA form instruction. */ #define VXA_MASK VXA(0x3f, 0x3f) -/* An VXR form instruction. */ +/* A VXR form instruction. */ #define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff)) /* The mask for a VXR form instruction. */ |