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author | Jason Chien <jason.chien@sifive.com> | 2023-06-27 07:48:52 +0000 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2023-07-10 22:29:15 +1000 |
commit | 60ef34a48cf1990c55f0ff86086f40d7dfbb4181 (patch) | |
tree | 665da88f2e924af9610fe120c94cab99ccfd411a /disas/nanomips.c | |
parent | 889caa44011d32a584c8e3a31bf91a7f9b73f2a3 (diff) | |
download | qemu-60ef34a48cf1990c55f0ff86086f40d7dfbb4181.zip qemu-60ef34a48cf1990c55f0ff86086f40d7dfbb4181.tar.gz qemu-60ef34a48cf1990c55f0ff86086f40d7dfbb4181.tar.bz2 |
target/riscv: Set the correct exception for implict G-stage translation fail
The privileged spec states:
For a memory access made to support VS-stage address translation (such as
to read/write a VS-level page table), permissions are checked as though
for a load or store, not for the original access type. However, any
exception is always reported for the original access type (instruction,
load, or store/AMO).
The current implementation converts the access type to LOAD if implicit
G-stage translation fails which results in only reporting "Load guest-page
fault". This commit removes the convertion of access type, so the reported
exception conforms to the spec.
Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230627074915.7686-1-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'disas/nanomips.c')
0 files changed, 0 insertions, 0 deletions