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author | Andreas Färber <afaerber@suse.de> | 2013-09-03 13:32:01 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:20:48 +0100 |
commit | bb0e627a84752707e629fde5534558ac08e7c521 (patch) | |
tree | 2815f4306ff55028de1c441380204e6d88e1457a /cputlb.c | |
parent | baea4fae7b6d75ce0d1aeb2be0a223c7be8f4161 (diff) | |
download | qemu-bb0e627a84752707e629fde5534558ac08e7c521.zip qemu-bb0e627a84752707e629fde5534558ac08e7c521.tar.gz qemu-bb0e627a84752707e629fde5534558ac08e7c521.tar.bz2 |
exec: Change memory_region_section_get_iotlb() argument to CPUState
It no longer needs CPUArchState since moving watchpoints to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'cputlb.c')
-rw-r--r-- | cputlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -261,7 +261,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr, } code_address = address; - iotlb = memory_region_section_get_iotlb(env, section, vaddr, paddr, xlat, + iotlb = memory_region_section_get_iotlb(cpu, section, vaddr, paddr, xlat, prot, &address); index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |