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author | Peter Maydell <peter.maydell@linaro.org> | 2016-01-21 14:15:05 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-21 14:15:05 +0000 |
commit | a54c87b68a0410d0cf6f8b84e42074a5cf463732 (patch) | |
tree | 5624221d5795a305436e7169701124d168963db3 /cputlb.c | |
parent | d7898cda81b6efa6b2d7a749882695cdcf280eaa (diff) | |
download | qemu-a54c87b68a0410d0cf6f8b84e42074a5cf463732.zip qemu-a54c87b68a0410d0cf6f8b84e42074a5cf463732.tar.gz qemu-a54c87b68a0410d0cf6f8b84e42074a5cf463732.tar.bz2 |
exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this
allows it to determine the correct AddressSpace to use for the lookup.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'cputlb.c')
-rw-r--r-- | cputlb.c | 6 |
1 files changed, 4 insertions, 2 deletions
@@ -449,6 +449,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) void *p; MemoryRegion *mr; CPUState *cpu = ENV_GET_CPU(env1); + CPUIOTLBEntry *iotlbentry; page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = cpu_mmu_index(env1, true); @@ -456,8 +457,9 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) (addr & TARGET_PAGE_MASK))) { cpu_ldub_code(env1, addr); } - pd = env1->iotlb[mmu_idx][page_index].addr & ~TARGET_PAGE_MASK; - mr = iotlb_to_region(cpu, pd); + iotlbentry = &env1->iotlb[mmu_idx][page_index]; + pd = iotlbentry->addr & ~TARGET_PAGE_MASK; + mr = iotlb_to_region(cpu, pd, iotlbentry->attrs); if (memory_region_is_unassigned(mr)) { CPUClass *cc = CPU_GET_CLASS(cpu); |