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author | Paolo Bonzini <pbonzini@redhat.com> | 2013-08-16 08:26:30 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-02-16 17:30:19 +0100 |
commit | 9d82b5a792236db31a75b9db5c93af69ac07c7c5 (patch) | |
tree | 95682ab6099e8e318102678fcba9cd2b62b9568c /cputlb.c | |
parent | 76e5c76f2e2e0d20bab2cd5c7a87452f711654fb (diff) | |
download | qemu-9d82b5a792236db31a75b9db5c93af69ac07c7c5.zip qemu-9d82b5a792236db31a75b9db5c93af69ac07c7c5.tar.gz qemu-9d82b5a792236db31a75b9db5c93af69ac07c7c5.tar.bz2 |
exec: make iotlb RCU-friendly
After the previous patch, TLBs will be flushed on every change to
the memory mapping. This patch augments that with synchronization
of the MemoryRegionSections referred to in the iotlb array.
With this change, it is guaranteed that iotlb_to_region will access
the correct memory map, even once the TLB will be accessed outside
the BQL.
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'cputlb.c')
-rw-r--r-- | cputlb.c | 5 |
1 files changed, 2 insertions, 3 deletions
@@ -265,8 +265,7 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, } sz = size; - section = address_space_translate_for_iotlb(cpu->as, paddr, - &xlat, &sz); + section = address_space_translate_for_iotlb(cpu, paddr, &xlat, &sz); assert(sz >= TARGET_PAGE_SIZE); #if defined(DEBUG_TLB) @@ -347,7 +346,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) cpu_ldub_code(env1, addr); } pd = env1->iotlb[mmu_idx][page_index] & ~TARGET_PAGE_MASK; - mr = iotlb_to_region(cpu->as, pd); + mr = iotlb_to_region(cpu, pd); if (memory_region_is_unassigned(mr)) { CPUClass *cc = CPU_GET_CLASS(cpu); |