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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-26 19:44:02 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-26 19:44:02 +0000 |
commit | 4f2ac237840677ffcb1b3ca30d04a4c2d360f7c7 (patch) | |
tree | 704572756ba55ed1631f64d1efc9511cec24560f /cpu-defs.h | |
parent | f658b4db792285d0ddc044d7532451b8ec3c4a08 (diff) | |
download | qemu-4f2ac237840677ffcb1b3ca30d04a4c2d360f7c7.zip qemu-4f2ac237840677ffcb1b3ca30d04a4c2d360f7c7.tar.gz qemu-4f2ac237840677ffcb1b3ca30d04a4c2d360f7c7.tar.bz2 |
amd64 port (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@762 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-defs.h')
-rw-r--r-- | cpu-defs.h | 26 |
1 files changed, 17 insertions, 9 deletions
@@ -29,8 +29,18 @@ #error TARGET_LONG_BITS must be defined before including this header #endif +#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__) +#define HOST_LONG_BITS 64 +#else +#define HOST_LONG_BITS 32 +#endif + #ifndef TARGET_PHYS_ADDR_BITS +#if TARGET_LONG_BITS >= HOST_LONG_BITS #define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS +#else +#define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS +#endif #endif #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) @@ -47,7 +57,11 @@ typedef uint64_t target_ulong; #endif /* target_phys_addr_t is the type of a physical address (its size can - be different from 'target_ulong') */ + be different from 'target_ulong'). We have sizeof(target_phys_addr) + = max(sizeof(unsigned long), + sizeof(size_of_target_physical_address)) because we must pass a + host pointer to memory operations in some cases */ + #if TARGET_PHYS_ADDR_BITS == 32 typedef uint32_t target_phys_addr_t; #elif TARGET_PHYS_ADDR_BITS == 64 @@ -56,12 +70,6 @@ typedef uint64_t target_phys_addr_t; #error TARGET_PHYS_ADDR_BITS undefined #endif -#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__) -#define HOST_LONG_BITS 64 -#else -#define HOST_LONG_BITS 32 -#endif - #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) #define EXCP_INTERRUPT 256 /* async interruption */ @@ -79,9 +87,9 @@ typedef struct CPUTLBEntry { bit 3 : indicates that the entry is invalid bit 2..0 : zero */ - uint32_t address; + target_ulong address; /* addend to virtual address to get physical address */ - uint32_t addend; + target_phys_addr_t addend; } CPUTLBEntry; #endif |