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authoraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-09 20:09:57 +0000
committeraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-09 20:09:57 +0000
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parentd85dc283fa87353be10b11b463196d10eb49ca41 (diff)
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KVM: Coalesced MMIO support
MMIO exits are more expensive in KVM or Xen than in QEMU because they involve, at least, privilege transitions. However, MMIO write operations can be effectively batched if those writes do not have side effects. Good examples of this include VGA pixel operations when in a planar mode. As it turns out, we can get a nice boost in other areas too. Laurent mentioned a 9.7% performance boost in iperf with the coalesced MMIO changes for the e1000 when he originally posted this work for KVM. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5961 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-all.h')
-rw-r--r--cpu-all.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/cpu-all.h b/cpu-all.h
index fadf89c..7102014 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -973,6 +973,15 @@ void cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, target_phys_a
void dump_exec_info(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+/* Coalesced MMIO regions are areas where write operations can be reordered.
+ * This usually implies that write operations are side-effect free. This allows
+ * batching which can make a major impact on performance when using
+ * virtualization.
+ */
+void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
+
+void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
+
/*******************************************/
/* host CPU ticks (if available) */