diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-22 20:37:34 +0000 |
---|---|---|
committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-22 20:37:34 +0000 |
commit | 967032c3d5547a9973465f495f8f25e3c7967633 (patch) | |
tree | aa6577c8726bacb9b49ec6a30545c02cdb64fa23 /cpu-all.h | |
parent | acb98efbbff1c51cd9a594af7daa4fe8b4560916 (diff) | |
download | qemu-967032c3d5547a9973465f495f8f25e3c7967633.zip qemu-967032c3d5547a9973465f495f8f25e3c7967633.tar.gz qemu-967032c3d5547a9973465f495f8f25e3c7967633.tar.bz2 |
Use correct types to enable > 2G support, based on a patch from
Anthony Liguori.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4238 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-all.h')
-rw-r--r-- | cpu-all.h | 16 |
1 files changed, 10 insertions, 6 deletions
@@ -700,7 +700,7 @@ static inline void stfq_be_p(void *ptr, float64 v) /* page related stuff */ -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +#define TARGET_PAGE_SIZE (1UL << TARGET_PAGE_BITS) #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) @@ -806,12 +806,16 @@ int cpu_inw(CPUState *env, int addr); int cpu_inl(CPUState *env, int addr); #endif +/* address in the RAM (different from a physical address) */ +typedef unsigned long ram_addr_t; + /* memory API */ -extern int phys_ram_size; +extern ram_addr_t phys_ram_size; extern int phys_ram_fd; extern uint8_t *phys_ram_base; extern uint8_t *phys_ram_dirty; +extern ram_addr_t ram_size; /* physical memory access */ #define TLB_INVALID_MASK (1 << 3) @@ -833,10 +837,10 @@ typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); void cpu_register_physical_memory(target_phys_addr_t start_addr, - unsigned long size, - unsigned long phys_offset); -uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr); -ram_addr_t qemu_ram_alloc(unsigned int size); + ram_addr_t size, + ram_addr_t phys_offset); +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); +ram_addr_t qemu_ram_alloc(ram_addr_t); void qemu_ram_free(ram_addr_t addr); int cpu_register_io_memory(int io_index, CPUReadMemoryFunc **mem_read, |