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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-01-11 13:25:40 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-01-11 13:25:40 +0000 |
| commit | f1945632b43e36bd9f3e0c2feb0e5b152be7ed91 (patch) | |
| tree | b2d4f343b5fb3b850cd459827e4330ca79f37b64 /bsd-user | |
| parent | 2eea841c11096e8dcc457b80e21f3fbdc32d2590 (diff) | |
| download | qemu-f1945632b43e36bd9f3e0c2feb0e5b152be7ed91.zip qemu-f1945632b43e36bd9f3e0c2feb0e5b152be7ed91.tar.gz qemu-f1945632b43e36bd9f3e0c2feb0e5b152be7ed91.tar.bz2 | |
hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
The GICv3 specification says that reserved register addresses
should RAZ/WI. This means we need to return MEMTX_OK, not MEMTX_ERROR,
because now that we support generating external aborts the
latter will cause an abort on new board models.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1513183941-24300-2-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Diffstat (limited to 'bsd-user')
0 files changed, 0 insertions, 0 deletions