aboutsummaryrefslogtreecommitdiff
path: root/block/vpc.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2017-07-21 13:28:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-07-21 13:28:51 +0100
commitff9b5475021d230eef39ec15af56c603eec1b82f (patch)
tree0e4b52d29c6c45f242eeb10fec8d89a8a36916d1 /block/vpc.c
parent14e167530adfc33f083299fb9f33499d18f3e729 (diff)
parentbad63a8008a0aaefcd00542c89bee01623d7c9de (diff)
downloadqemu-ff9b5475021d230eef39ec15af56c603eec1b82f.zip
qemu-ff9b5475021d230eef39ec15af56c603eec1b82f.tar.gz
qemu-ff9b5475021d230eef39ec15af56c603eec1b82f.tar.bz2
Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170721' into staging
MIPS patches 2017-07-21 Changes: * Add Enhanced Virtual Addressing (EVA) support # gpg: Signature made Fri 21 Jul 2017 03:25:15 BST # gpg: using RSA key 0x2238EB86D5F797C2 # gpg: Good signature from "Yongbok Kim <yongbok.kim@imgtec.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8600 4CF5 3415 A5D9 4CFA 2B5C 2238 EB86 D5F7 97C2 * remotes/yongbok/tags/mips-20170721: target/mips: Enable CP0_EBase.WG on MIPS64 CPUs target/mips: Add EVA support to P5600 target/mips: Implement segmentation control target/mips: Add segmentation control registers target/mips: Add an MMU mode for ERL target/mips: Abstract mmu_idx from hflags target/mips: Check memory permissions with mem_idx target/mips: Decode microMIPS EVA load & store instructions target/mips: Decode MIPS32 EVA load & store instructions target/mips: Prepare loads/stores for EVA target/mips: Add CP0_Ebase.WG (write gate) support target/mips: Weaken TLB flush on UX,SX,KX,ASID changes target/mips: Fix TLBWI shadow flush for EHINV,XI,RI target/mips: Fix MIPS64 MFC0 UserLocal on BE host Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'block/vpc.c')
0 files changed, 0 insertions, 0 deletions