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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-09-25 15:34:05 +0200 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-10-07 08:41:33 +1000 |
commit | 284a66a8f6ffc8a720071b3f3cbc10cff0637337 (patch) | |
tree | a3e451a25dd013f13b23c43ca975ed72cd74d3d0 /block/export | |
parent | 6a03349007f84e514e2e3def25c3f85400fdb47a (diff) | |
download | qemu-284a66a8f6ffc8a720071b3f3cbc10cff0637337.zip qemu-284a66a8f6ffc8a720071b3f3cbc10cff0637337.tar.gz qemu-284a66a8f6ffc8a720071b3f3cbc10cff0637337.tar.bz2 |
hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition
The current MCHP_PFSOC_MMUART_REG_SIZE definition represent the
size occupied by all the registers. However all registers are
32-bit wide, and the MemoryRegionOps handlers are restricted to
32-bit:
static const MemoryRegionOps mchp_pfsoc_mmuart_ops = {
.read = mchp_pfsoc_mmuart_read,
.write = mchp_pfsoc_mmuart_write,
.impl = {
.min_access_size = 4,
.max_access_size = 4,
},
Avoid being triskaidekaphobic, simplify by using the number of
registers.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210925133407.1259392-2-f4bug@amsat.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'block/export')
0 files changed, 0 insertions, 0 deletions