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| author | Leon Alrae <leon.alrae@imgtec.com> | 2015-09-14 13:51:31 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-10-29 16:16:44 +0000 |
| commit | 2dcf7908d9e0274c08911400beb7ed14276bb170 (patch) | |
| tree | 31852b7fb89257870cb1ce5a96e9f703183efb72 /backends | |
| parent | 7540a43a1d9de71fa7a53ccd2bb24a04e2aace41 (diff) | |
| download | qemu-2dcf7908d9e0274c08911400beb7ed14276bb170.zip qemu-2dcf7908d9e0274c08911400beb7ed14276bb170.tar.gz qemu-2dcf7908d9e0274c08911400beb7ed14276bb170.tar.bz2 | |
target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6
Implement the relationship between CP0.Status.KX, SX and UX. It should not
be possible to set UX bit if SX is 0, the same applies for setting SX if
KX is 0.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'backends')
0 files changed, 0 insertions, 0 deletions