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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-03-23 21:06:22 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-16 20:13:51 -0700 |
| commit | aece72b76bfeffcab715cd62742fd7f366ceb079 (patch) | |
| tree | 2cdc6f92b721daa564302b804dacbee7ecad1ab2 /accel | |
| parent | c31e5fa44d0ebd2e78f1ead2147e30cd137ae5e7 (diff) | |
| download | qemu-aece72b76bfeffcab715cd62742fd7f366ceb079.zip qemu-aece72b76bfeffcab715cd62742fd7f366ceb079.tar.gz qemu-aece72b76bfeffcab715cd62742fd7f366ceb079.tar.bz2 | |
tcg: Add page_bits and page_mask to TCGContext
Disconnect guest page size from TCG compilation.
While this could be done via exec/target_page.h, we want to cache
the value across multiple memory access operations, so we might
as well initialize this early.
The changes within tcg/ are entirely mechanical:
sed -i s/TARGET_PAGE_BITS/s->page_bits/g
sed -i s/TARGET_PAGE_MASK/s->page_mask/g
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/translate-all.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 99a9d0e..ca306f6 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -357,6 +357,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb_set_page_addr1(tb, -1); tcg_ctx->gen_tb = tb; tcg_ctx->addr_type = TCG_TYPE_TL; +#ifdef CONFIG_SOFTMMU + tcg_ctx->page_bits = TARGET_PAGE_BITS; + tcg_ctx->page_mask = TARGET_PAGE_MASK; +#endif tb_overflow: |