diff options
| author | Michael Clark <mjc@sifive.com> | 2018-03-03 01:31:14 +1300 |
|---|---|---|
| committer | Michael Clark <mjc@sifive.com> | 2018-03-07 08:30:28 +1300 |
| commit | bb72692cbdbeeef88f4dd1828c1ad6f92cd57b7e (patch) | |
| tree | b7b17ad6fc655dd1073146b4a43f5c3f6815ad81 /accel | |
| parent | 04331d0b56a0cab2e40a39135a92a15266b37c36 (diff) | |
| download | qemu-bb72692cbdbeeef88f4dd1828c1ad6f92cd57b7e.zip qemu-bb72692cbdbeeef88f4dd1828c1ad6f92cd57b7e.tar.gz qemu-bb72692cbdbeeef88f4dd1828c1ad6f92cd57b7e.tar.bz2 | |
SiFive RISC-V UART Device
QEMU model of the UART on the SiFive E300 and U500 series SOCs.
BBL supports the SiFive UART for early console access via the SBI
(Supervisor Binary Interface) and the linux kernel SBI console.
The SiFive UART implements the pre qom legacy interface consistent
with the 16550a UART in 'hw/char/serial.c'.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stefan O'Rear <sorear2@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'accel')
0 files changed, 0 insertions, 0 deletions