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author | Tong Ho <tong.ho@xilinx.com> | 2021-09-16 22:23:58 -0700 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-30 13:42:10 +0100 |
commit | 7e47e15c8b47ac866e8f07998276b01e612a360a (patch) | |
tree | 0be74cbcd80bca16fa9b26c9275ec4172ae40c0f /accel | |
parent | 5f4910ff12f88f9750608cbfe07895204405bed1 (diff) | |
download | qemu-7e47e15c8b47ac866e8f07998276b01e612a360a.zip qemu-7e47e15c8b47ac866e8f07998276b01e612a360a.tar.gz qemu-7e47e15c8b47ac866e8f07998276b01e612a360a.tar.bz2 |
hw/arm: xlnx-zcu102: Add Xilinx BBRAM device
Connect the support for Xilinx ZynqMP Battery-Backed RAM (BBRAM)
The command argument:
-drive if=pflash,index=2,...
Can be used to optionally connect the bbram to a backend
storage, such that field-programmed values in one
invocation can be made available to next invocation.
The backend storage must be a seekable binary file, and
its size must be 36 bytes or larger. A file with all
binary 0's is a 'blank'.
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-8-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'accel')
0 files changed, 0 insertions, 0 deletions