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authorRichard Henderson <richard.henderson@linaro.org>2019-04-03 10:37:13 +0700
committerRichard Henderson <richard.henderson@linaro.org>2019-05-10 11:12:50 -0700
commit69963f5709a0645934c169784820d0bee22208ba (patch)
tree227d4f8242c64dee3da5df2e32d526e06eb1fa15 /accel
parentc319dc13579a92937bffe02ad2c9f1a550e73973 (diff)
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tcg: Remove CPUClass::handle_mmu_fault
This hook is now completely replaced by tlb_fill. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
-rw-r--r--accel/tcg/user-exec.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 199f88c..8cfbeb1 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -63,7 +63,6 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
{
CPUState *cpu = current_cpu;
CPUClass *cc;
- int ret;
unsigned long address = (unsigned long)info->si_addr;
MMUAccessType access_type;
@@ -156,15 +155,9 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
helper_retaddr = 0;
cc = CPU_GET_CLASS(cpu);
- if (cc->tlb_fill) {
- access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
- cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
- g_assert_not_reached();
- } else {
- ret = cc->handle_mmu_fault(cpu, address, 0, is_write, MMU_USER_IDX);
- g_assert(ret > 0);
- cpu_loop_exit_restore(cpu, pc);
- }
+ access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
+ cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
+ g_assert_not_reached();
}
#if defined(__i386__)