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| author | Emilio G. Cota <cota@braap.org> | 2018-10-09 13:45:54 -0400 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2018-10-18 18:58:10 -0700 |
| commit | 5005e2537d090bee87aca3b924dcd17920fd146a (patch) | |
| tree | b9f484d7c63ec09432627ea188723a1a3a11afa8 /accel | |
| parent | 022d6378c7fda797ef91fe71a4e13a7a651298b8 (diff) | |
| download | qemu-5005e2537d090bee87aca3b924dcd17920fd146a.zip qemu-5005e2537d090bee87aca3b924dcd17920fd146a.tar.gz qemu-5005e2537d090bee87aca3b924dcd17920fd146a.tar.bz2 | |
exec: introduce tlb_init
Paves the way for the addition of a per-TLB lock.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <20181009174557.16125-4-cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/cputlb.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index f4702ce..502eea2 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -73,6 +73,10 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data)); QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) +void tlb_init(CPUState *cpu) +{ +} + /* flush_all_helper: run fn across all cpus * * If the wait flag is set then the src cpu's helper will be queued as |