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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-12-07 11:47:41 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-01-21 14:21:59 -1000 |
| commit | 722a1c1e97c1edeca5ad458ad2ce3441b47f0440 (patch) | |
| tree | de1df0d36ceb9fd17f60868351ffacb4ff0c457b /accel/tcg | |
| parent | 7a1efe1b97c4f68f2f78cbca2e512324ed07524d (diff) | |
| download | qemu-722a1c1e97c1edeca5ad458ad2ce3441b47f0440.zip qemu-722a1c1e97c1edeca5ad458ad2ce3441b47f0440.tar.gz qemu-722a1c1e97c1edeca5ad458ad2ce3441b47f0440.tar.bz2 | |
cputlb: Pass CPUTLBDescFast to tlb_n_entries and sizeof_tlb
We do not need the entire CPUArchState to compute these values.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg')
| -rw-r--r-- | accel/tcg/cputlb.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 500c56d..cc6f4c9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -80,14 +80,14 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data)); QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) -static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) +static inline size_t tlb_n_entries(CPUTLBDescFast *fast) { - return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1; + return (fast->mask >> CPU_TLB_ENTRY_BITS) + 1; } -static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx) +static inline size_t sizeof_tlb(CPUTLBDescFast *fast) { - return env_tlb(env)->f[mmu_idx].mask + (1 << CPU_TLB_ENTRY_BITS); + return fast->mask + (1 << CPU_TLB_ENTRY_BITS); } static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, @@ -156,7 +156,7 @@ static void tlb_dyn_init(CPUArchState *env) static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx) { CPUTLBDesc *desc = &env_tlb(env)->d[mmu_idx]; - size_t old_size = tlb_n_entries(env, mmu_idx); + size_t old_size = tlb_n_entries(&env_tlb(env)->f[mmu_idx]); size_t rate; size_t new_size = old_size; int64_t now = get_clock_realtime(); @@ -236,7 +236,8 @@ static void tlb_flush_one_mmuidx_locked(CPUArchState *env, int mmu_idx) env_tlb(env)->d[mmu_idx].large_page_addr = -1; env_tlb(env)->d[mmu_idx].large_page_mask = -1; env_tlb(env)->d[mmu_idx].vindex = 0; - memset(env_tlb(env)->f[mmu_idx].table, -1, sizeof_tlb(env, mmu_idx)); + memset(env_tlb(env)->f[mmu_idx].table, -1, + sizeof_tlb(&env_tlb(env)->f[mmu_idx])); memset(env_tlb(env)->d[mmu_idx].vtable, -1, sizeof(env_tlb(env)->d[0].vtable)); } @@ -719,7 +720,7 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length) qemu_spin_lock(&env_tlb(env)->c.lock); for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { unsigned int i; - unsigned int n = tlb_n_entries(env, mmu_idx); + unsigned int n = tlb_n_entries(&env_tlb(env)->f[mmu_idx]); for (i = 0; i < n; i++) { tlb_reset_dirty_range_locked(&env_tlb(env)->f[mmu_idx].table[i], |