aboutsummaryrefslogtreecommitdiff
path: root/accel/tcg/tcg-accel-ops-icount.h
diff options
context:
space:
mode:
authorJamie Iles <quic_jiles@quicinc.com>2023-04-27 03:09:25 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-05-11 09:53:41 +0100
commit83ecdb18eb65ed57239b87f3898ae92a590d0077 (patch)
treea7a719b909ac8b163c7b7642855d877227afb9cd /accel/tcg/tcg-accel-ops-icount.h
parent370ed600296982a0248b091915c8e8893508d8a3 (diff)
downloadqemu-83ecdb18eb65ed57239b87f3898ae92a590d0077.zip
qemu-83ecdb18eb65ed57239b87f3898ae92a590d0077.tar.gz
qemu-83ecdb18eb65ed57239b87f3898ae92a590d0077.tar.bz2
accel/tcg/tcg-accel-ops-rr: ensure fairness with icount
The round-robin scheduler will iterate over the CPU list with an assigned budget until the next timer expiry and may exit early because of a TB exit. This is fine under normal operation but with icount enabled and SMP it is possible for a CPU to be starved of run time and the system live-locks. For example, booting a riscv64 platform with '-icount shift=0,align=off,sleep=on -smp 2' we observe a livelock once the kernel has timers enabled and starts performing TLB shootdowns. In this case we have CPU 0 in M-mode with interrupts disabled sending an IPI to CPU 1. As we enter the TCG loop, we assign the icount budget to next timer interrupt to CPU 0 and begin executing where the guest is sat in a busy loop exhausting all of the budget before we try to execute CPU 1 which is the target of the IPI but CPU 1 is left with no budget with which to execute and the process repeats. We try here to add some fairness by splitting the budget across all of the CPUs on the thread fairly before entering each one. The CPU count is cached on CPU list generation ID to avoid iterating the list on each loop iteration. With this change it is possible to boot an SMP rv64 guest with icount enabled and no hangs. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427020925.51003-3-quic_jiles@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/tcg-accel-ops-icount.h')
-rw-r--r--accel/tcg/tcg-accel-ops-icount.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/accel/tcg/tcg-accel-ops-icount.h b/accel/tcg/tcg-accel-ops-icount.h
index 1b6fd9c..16a301b 100644
--- a/accel/tcg/tcg-accel-ops-icount.h
+++ b/accel/tcg/tcg-accel-ops-icount.h
@@ -11,7 +11,8 @@
#define TCG_ACCEL_OPS_ICOUNT_H
void icount_handle_deadline(void);
-void icount_prepare_for_run(CPUState *cpu);
+void icount_prepare_for_run(CPUState *cpu, int64_t cpu_budget);
+int64_t icount_percpu_budget(int cpu_count);
void icount_process_data(CPUState *cpu);
void icount_handle_interrupt(CPUState *cpu, int mask);